G06F3/0652

Memory controller for controlling different numbers of memory devices and storage device including the same
11543998 · 2023-01-03 · ·

A storage device includes first and second memory devices, and a memory controller. The first memory devices correspond to a main data area. The second memory devices correspond to a reserved area. The memory controller is coupled to the first and second memory devices through first and second channels. A number of first memory devices coupled to the memory controller through the first channel is equal to a number of first memory devices coupled to the memory controller through the second channel, and a number of second memory devices coupled to the memory controller through the first channel is different from a number of second memory devices coupled to the memory controller through the second channel. The memory controller selects a memory device on which a write operation is to be performed, based on a memory state of the first and second memory devices.

Data storage device self-configuring based on customer prediction model

A data storage device is disclosed comprising a non-volatile storage medium (NVSM), and control circuitry configured to receive a plurality of access commands, process the plurality of access commands using a customer prediction model to predict a customer of the data storage device, wherein the customer prediction model is trained off-line based on access patterns of a plurality of different customers. The control circuitry then configures access to the NVSM based on the predicted customer.

Data Storage Method, Apparatus and Storage System
20220413706 · 2022-12-29 ·

The present application provides a data storage method, a data storage apparatus and a storage system, wherein the method includes: determining a data type of to-be-stored data when the to-be-stored data is obtained (S410); determining a target storage area with a data type same as that of the to-be-stored data based on the data type of data stored in each storage area in the SMR disk (S420); determining in the target storage area a target storage block into which the to-be-stored data is to be written (S430); generating the main index information and backup index information of the to-be-stored data based on the identifier of the target storage block (S440); generating the database index information of the to-be-stored data based on the to-be-stored data and the identifier of the target storage block (S450); and writing the to-be-stored data and the backup index information of the to-be-stored data into the target storage block, writing the main index information of the to-be-stored data into the CMR area or the non-SMR disk, and writing the database index information of the to-be-stored data into the non-SMR

CROSSING FRAMES ENCODING MANAGEMENT METHOD, MEMORY STORAGE APPARATUS AND MEMORY CONTROL CIRCUIT UNIT
20220413960 · 2022-12-29 · ·

A crossing frames encoding management method, a memory storage apparatus, and a memory control circuit unit are disclosed. The method includes: reading a tag swap information corresponding to a first physical group; encoding a first data; storing a first part of the encoded first data to at least one first physical unit corresponding to a first tag information in the first physical group; and storing a second part of the encoded first data to at least one second physical unit corresponding to a second tag information in the first physical group according to the tag swap information. The first tag information corresponds to a first crossing frames encoding group. The second tag information corresponds to a second crossing frames encoding group. The first crossing frames encoding group is different from the second crossing frames encoding group.

STORAGE DEVICES PERFORMING SECURE ERASE AND OPERATING METHODS THEREOF
20220413701 · 2022-12-29 ·

A storage device performing a secure erase and an operating method thereof are provided. The storage device may include a controller configured to control a non-volatile memory device including a plurality of blocks. The controller includes a secure erase control logic configured to control a secure erase operation on the plurality of blocks and perform a control operation in response to a secure erase request from a host with respect to a first block among the plurality of blocks such that the secure erase operation on the first block is skipped based on a result of determining at least one selected from a secure erase state and/or a deterioration state of the first block.

Integration of hashgraph and erasure coding for data integrity

A data storage system uses erasure coding in combination with hashgraph to organize stored data and recover that data in a computing environment.

Enhanced Word Line Stripe Erase Abort Detection
20220415403 · 2022-12-29 ·

Storage devices include a memory array comprised of a plurality of memory devices arranged in word lines. The word lines are further arranged within memory blocks. When erasing memory blocks, various storage devices may utilize a stripe-erase process that alternates the erasure of word lines within the memory blocks. The stripe-erase process is often carried out in multiple steps. However, an ungraceful shutdown can interrupt the erasing processing between one of these stripe-erase steps. The status of each memory device associated with the aborted erasure needs to be known before operations can continue. Methods and systems described herein properly classify and process memory blocks after an aborted erase command by analyzing both even and odd word lines within each of the memory blocks. By properly categorizing each memory block, overprogramming and other negative effects can be avoided, increasing the overall lifespan of the storage device that utilizes a stripe-erase process.

Secure-Erase Prediction for Data Storage Devices

Systems and methods for predicting whether a nonvolatile memory block is likely capable of being securely erased to be eligible for composing into another composable infrastructure are described. A management module receives a secure-erase command to erase at least one nonvolatile memory block, determines health parameters of the nonvolatile memory block, calculates a failure index based on the health parameters, and, based on the failure index, either securely erases the block of memory or retires the nonvolatile memory block.

Apparatus and method for erasing data programmed in a non-volatile memory block in a memory system
11537315 · 2022-12-27 · ·

A memory system includes a memory device having a plurality of memory blocks for storing data, and a controller configured to perform an erase operation including plural unit erase operations to erase data stored in at least one target memory block included in the plurality of memory blocks. The controller can be configured to perform at least some of the plural unit erase operations onto the at least one target memory block before the at least one target memory block allocated for storing data.

Memory system and operating method thereof
11537318 · 2022-12-27 · ·

A memory system includes: a memory device; a command queue queuing a program descriptor and a first read descriptor, and sequentially outputting the descriptors; a program manager performing an error handling operation in response to the program descriptor, the error handling operation including performing a program operation on a second physical address when a program operation performed on a first physical address fails; a fail managing buffer storing the first physical address for the failed program operation; a queue manager deleting the first read descriptor from the command queue and outputting an exception signal, when a physical address of the first read descriptor is the same as the first physical address; and a descriptor generator generating a second read descriptor including the second physical address in response to the exception signal and enqueuing the second read descriptor in the command queue, when the error handling operation passed.