G06F3/0664

Host bus adaptor (HBA) virtualization awareness for effective input-output load balancing

An apparatus comprises at least one processing device that is configured to control delivery of input-output operations from a host device to a storage system over selected ones of a plurality of paths through a network. The at least one processing device is further configured to detect a reduction in performance of one or more of the input-output operations over one or more paths of the plurality of paths, to identify a physical initiator component corresponding to the one or more paths, and to notify the storage system about the reduction in performance and the identified physical initiator component. The at least one processing device is also configured to receive a notification from the storage system indicating one or more virtual initiator instances of a plurality of virtual initiator instances corresponding to the identified physical initiator component, and to deactivate the one or more virtual initiator instances.

Writing data using references to previously stored data

A system and method comprising: receiving a request to write data stored at a first range of a first volume to a second range of a second volume, where first metadata for the first range of the first volume is associated with a range of physical addresses where the data is stored in the storage system; and responsive to receiving the request: creating second metadata for the second range of the second volume, wherein the second metadata is associated with the range of physical addresses where the data is stored in the storage system; and associating the second volume with the second metadata.

Norflash sharing

A system on a chip allows external NorFlash memory sharing by multiple master devices. The system on a chip is configured to use an external NorFlash memory and includes a plurality of master devices and NorFlash virtualising circuity. The NorFlash virtualizing circuitry is configured to suspend a program operation or an erase operation being carried out on the external NorFlash memory, permit a read operation to be carried out on the NorFlash memory and then resume the suspended program operation or erase operation. Each master device of the plurality of master devices operates as a master to independently access the external NorFlash memory.

Non-volatile memory with on-chip principal component analysis for generating low dimensional outputs for machine learning

Methods and apparatus are disclosed for implementing principal component analysis (PCA) within a non-volatile memory (NVM) die of solid state drive (SSD) to reduce the dimensionality of machine learning data before the data is transferred to other components of the SSD, such as to a data storage controller equipped with a machine learning engine. The machine learning data may include, for example, training images for training an image recognition system in which the SSD is installed. In some examples, the on-chip PCA components of the NVM die are configured as under-the-array or next-to-the-array components. In other examples, one or more arrays of the NVM die are configured as multiplication cores for performing PCA matrix multiplication. In still other aspects, multiple NVM dies are arranged in parallel, each with on-chip PCA components to permit parallel concurrent on-chip processing of machine learning data.

Configurable Interface Circuit

A configurable interface circuit is disclosed. An integrated circuit (IC) having a particular configuration. The IC includes a memory system and a communication fabric coupled to the memory system. The IC further includes a plurality of agent circuits configured to make requests to the memory system that are in a first format that is not specific to the particular configuration of the IC. A plurality of interface circuits is coupled between corresponding ones of the plurality of agent circuits and the communication fabric. A given one of the plurality of interface circuits is configured to receive a request to the memory system in the first format and output the request in a second format that is specific to the particular configuration of the IC.

Recovering Data In A Virtual Storage System

Data recovery in a virtual storage system, including: detecting, within storage provided by a first tier of storage of the virtual storage system, data loss within a dataset, wherein recovery data for the dataset is stored in a second tier of storage; determining a recovery point for the dataset up to which a consistent version of the dataset is recoverable from the recovery data stored in the second tier of storage; and restoring, within the storage provided by the first tier of storage of the virtual storage system, the consistent version of the dataset.

System, target apparatus, terminal, program, and method
11467985 · 2022-10-11 · ·

A system includes: a terminal that is capable of executing a plurality of programs; and a target apparatus that is capable of communicating with the terminal. The target apparatus includes: an acceptance unit that receives a specific operation; and a transmission unit that transmits trigger information to the terminal upon the acceptance unit receiving the specific operation. The terminal includes: a receiving unit that receives the trigger information from the transmission unit; a selection unit that selects a program corresponding to the target apparatus from the plurality of programs upon the receiving unit receiving the trigger information; and a processing unit that performs processing corresponding to the selected program.

STORAGE SYSTEM AND DATA RESTORATION METHOD
20230113507 · 2023-04-13 · ·

This invention prevents valid data written from a healthy host from being lost when restoring data corrupted by a host infected by malware from a backup. In the disclosed storage system, a storage controller records history of data updates to data in volumes made by hosts (host computers) as update history information (an update history management table) with information that can identify the hosts respectively. When having been requested to restore data in a particular volume of the volumes with specifications of a host for which to invalidate data updates and a date and time to do so, based on the update history information, the storage controller invalidates data updates made by the specified host after the specified date and time, whereas keeping data updates valid made by a host different from the specified host after the specified date and time, and restores the particular volume.

NVMe-based data read method, apparatus, and system

A non-volatile memory express (NVMe)-based data read method, apparatus, and system are provided. In various embodiments, a read instruction can be triggered by a host. The read instruction carries indication information of a first address opened by the host to an NVMe controller for addressing and accessing. In those embodiments, the host after obtaining the read instruction can send a data packet to the host. The data packet carries the first address and payload data. Still in those embodiments, the host can, after receiving the data packet, determine a second address based on the first address, and store the payload data into storage space indicated by the second address. The second address may be a private memory address of the host. Because a relationship between the second address and a communication protocol is broken, and the host may access the second address without being restricted by the communication protocol.

Predictive scheduled backup system and method

Embodiments for predictive scheduling of backups in a data protection system by initiating a first backup job in a series of scheduled consecutive backup jobs, wherein a second backup job is allowed to begin only after the first backup job is finished and not active, detecting whether or not the first backup job is still active when a second job is to start, and if so, estimating an amount of additional time required to finish the first backup job. The second backup job is then rescheduled to start at least at the end of the additional time. The estimated amount of additional time is determined using a throughput to target storage device parameter. This parameter is periodically checked to determine if there is a change to the estimated amount of additional time, and if so, the estimated time is recalculated based on the changed parameter.