Methods for evaluating quantum computing circuits in view of the resource costs of a quantum algorithm are described. A processor-implemented method for performing an evaluation of a polynomial corresponding to an input is provided. The method includes determining a polynomial interpolation for a set of sub-intervals corresponding to the input. The method further includes constructing a quantum circuit for performing, in parallel, polynomial evaluation corresponding to each of the set of sub-intervals.

Apparatus performs various modal interval computations, while accounting for various modal interval operand configurations that are not amenable to ordinary computational operations. Upon detecting an exponent field of all 1's, the apparatus adapts various conventions involving leading bits in the fraction field of the modal interval endpoints to return a result having a useful meaning.

Apparatus performs various modal interval computations, while accounting for various modal interval operand configurations that are not amenable to ordinary computational operations. Upon detecting an exponent field of all 1's, the apparatus adapts various conventions involving leading bits in the fraction field of the modal interval endpoints to return a result having a useful meaning.

Methods for evaluating quantum computing circuits in view of the resource costs of a quantum algorithm are described. A processor-implemented method for performing an evaluation of a polynomial corresponding to an input is provided. The method includes determining a polynomial interpolation for a set of sub-intervals corresponding to the input. The method further includes constructing a quantum circuit for performing, in parallel, polynomial evaluation corresponding to each of the set of sub-intervals.

Apparatus performs various modal interval computations, while accounting for various modal interval operand configurations that are not amenable to ordinary computational operations. Upon detecting an exponent field of all 1's, the apparatus adapts various conventions involving leading bits in the fraction field of the modal interval endpoints to return a result having a useful meaning.

A method is described that includes performing the following with a single instruction: receiving a first input operand V; receiving a second input operand S; calculating V?S; determining if V?S is positive or negative; and, providing as a resultant: V if V?S is negative; V?S if V?S is positive.

The apparatus and method for calculating and retaining a bound on error during floating point operations inserts an additional bounding field into the standard floating-point format that records the retained significant bits of the calculation with notification upon insufficient retention. The bounding field, which accounts for both rounding and cancellation errors, has two parts, the lost bits D Field and the accumulated rounding error R Field. The D Field states the number of bits in the floating point representation that are no longer meaningful. The bounds on the real value represented are determined from the truncated floating point value (first bound) and the addition of the error determined by the number of lost bits (second bound). The true, real value is absolutely contained by the first and second bounds. The allowed loss (optionally programmable) of significant bits provides a fail-safe, real-time notification of loss of significant bits.

Apparatus performs various modal interval computations, while accounting for various modal interval operand configurations that are not amenable to ordinary computational operations. Upon detecting an exponent field of all 1's, the apparatus adapts various conventions involving leading bits in the fraction field of the modal interval endpoints to return a result having a useful meaning.

The apparatus and method for calculating and retaining a bound on error during floating point operations inserts an additional bounding field into the standard floating-point format that records the retained significant bits of the calculation with notification upon insufficient retention. The bounding field, which accounts for both rounding and cancellation errors, has two parts, the lost bits D Field and the accumulated rounding error R Field. The D Field states the number of bits in the floating point representation that are no longer meaningful. The bounds on the real value represented are determined from the truncated floating point value (first bound) and the addition of the error determined by the number of lost bits (second bound). The true, real value is absolutely contained by the first and second bounds. The allowed loss (optionally programmable) of significant bits provides a fail-safe, real-time notification of loss of significant bits.

A logic circuit computes various modal interval arithmetic values using a plurality of arithmetic function units. A multiplexer gates the desired arithmetic values to a storage register.