G06F8/434

Compilation scheme for tagged global variables
11055202 · 2021-07-06 · ·

A system and method for accessing a tagged global variable in software, including: randomly generating tags for global variables in the software; tagging the global variables with the random tags; creating a pointer to each global variable with the random tags in unused bits of the pointer wherein the pointer points to the associated global variable; accessing one global variable indirectly using the tagged pointer; determining whether tag on the accessed global variable matches the tag on the accessed pointer; and indicating a fault when the tag on the accessed global variable does not match the tag on the accessed pointer.

Security concepts for web frameworks

Embodiments described herein provide for virtual machine (VM) based exploit mitigation techniques that can be used to harden web content frameworks and JavaScript Engines. Some embodiments described herein are also generally applicable to other system frameworks, libraries, and program code that executes on a processor that is vulnerable to an attack using a security exploit. Program code that implements the techniques described herein can prevent the use of security exploit attacks to bypass security properties within the program code.

Processor that includes a special store instruction used in regions of a computer program where memory aliasing may occur

Processor hardware detects when memory aliasing occurs, and assures proper operation of the code even in the presence of memory aliasing. The processor defines a special store instruction that is different from a regular store instruction. The special store instruction is used in regions of the computer program where memory aliasing may occur. Because the hardware can detect and correct for memory aliasing, this allows a compiler to make optimizations such as register promotion even in regions of the code where memory aliasing may occur.

Code generation relating to providing table of contents pointer values

Code generation relating to providing table of contents (TOC) pointer values. Code to be compiled is obtained by a processor. Based on obtaining the code, a determination is made as to whether the code is to access a reference data structure. Based on determining the code is to access the reference data structure, other code is included in the code to provide a pointer to the reference data structure. The other code includes an architectural definition to provide the pointer to the reference data structure.

COMPILATION AND EXECUTION OF SOURCE CODE AS SERVICES

This document relates to compilation of source code into services. One example method involves receiving input source code, identifying data dependencies in the input source code, and identifying immutability points in the input source code based at least on the data dependencies. The example method also involves converting at least some of the input source code occurring after the immutability points to one or more service modules.

Binding constants at runtime for improved resource utilization

A just-in-time (JIT) compiler binds constants to specific memory locations at runtime. The JIT compiler parses program code derived from a multithreaded application and identifies an instruction that references a uniform constant. The JIT compiler then determines a chain of pointers that originates within a root table specified in the multithreaded application and terminates at the uniform constant. The JIT compiler generates additional instructions for traversing the chain of pointers and inserts these instructions into the program code. A parallel processor executes this compiled code and, in doing so, causes a thread to traverse the chain of pointers and bind the uniform constant to a uniform register at runtime. Each thread in a group of threads executing on the parallel processor may then access the uniform constant.

Uniform register file for improved resource utilization

A compiler parses a multithreaded application into cohesive blocks of instructions. Cohesive blocks include instructions that do not diverge or converge. Each cohesive block is associated with one or more uniform registers. When a set of threads executes the instructions in a given cohesive block, each thread in the set may access the uniform register independently of the other threads in the set. Accordingly, the uniform register may store a single copy of data on behalf of all threads in the set of threads, thereby conserving resources.

Code generation relating to providing table of contents pointer values

Code generation relating to providing table of contents (TOC) pointer values. Code to be compiled is obtained by a processor. Based on obtaining the code, a determination is made as to whether the code is to access a reference data structure. Based on determining the code is to access the reference data structure, other code is included in the code to provide a pointer to the reference data structure. The other code includes an architectural definition to provide the pointer to the reference data structure.

COMPILER-BASED GENERATION OF TRANSACTION ACCURATE MODELS FROM HIGH-LEVEL LANGUAGES

Compiling a high-level synthesis circuit design for simulation includes analyzing, using computer hardware, a kernel specified in a high-level language to detect pointers therein. A determination is made as to which of the pointers are global address space pointers referencing a global address space. The kernel is instrumented by replacing accesses in the kernel to the global address space with calls to wrapper functions for performing the accesses. A simulation kernel is generated that specifies an assembly language version of the kernel as instrumented.

SYSTEM FOR GENERATING A MAP ILLUSTRATING BINDINGS
20200264853 · 2020-08-20 ·

The disclosed embodiments relate to a system that facilitates developing applications in a component-based software development environment. This system provides an execution environment comprising instances of application components and a registry that maps names to instances of application components. Within the registry, each entry is associated with a list of notification dependencies that specifies component instances to be notified when the registry entry changes. Upon receiving a command to display notification dependencies for the registry, the system generates and displays a dependency graph containing nodes representing component instances and arrows between the nodes representing notification dependencies between the component instances. Upon receiving a command to display a timeline for with the registry, the system generates and displays a timeline representing events associated with the registry in chronological order.