Code generation relating to providing table of contents (TOC) pointer values. Code to be compiled is obtained by a processor. Based on obtaining the code, a determination is made as to whether the code is to access a reference data structure. Based on determining the code is to access the reference data structure, other code is included in the code to provide a pointer to the reference data structure. The other code includes an architectural definition to provide the pointer to the reference data structure.

Code generation relating to providing table of contents (TOC) pointer values. Code to be compiled is obtained by a processor. Based on obtaining the code, a determination is made as to whether the code is to access a reference data structure. Based on determining the code is to access the reference data structure, other code is included in the code to provide a pointer to the reference data structure. The other code includes an architectural definition to provide the pointer to the reference data structure.

Predicting a Table of Contents (TOC) pointer value responsive to branching to a subroutine. A subroutine is called from a calling module executing on a processor. Based on calling the subroutine, a value of a pointer to a reference data structure, such as a TOC, is predicted. The predicting is performed prior to executing a sequence of one or more instructions in the subroutine to compute the value. The value that is predicted is used to access the reference data structure to obtain a variable value for a variable of the subroutine.

Predicting a Table of Contents (TOC) pointer value responsive to branching to a subroutine. A subroutine is called from a calling module executing on a processor. Based on calling the subroutine, a value of a pointer to a reference data structure, such as a TOC, is predicted. The predicting is performed prior to executing a sequence of one or more instructions in the subroutine to compute the value. The value that is predicted is used to access the reference data structure to obtain a variable value for a variable of the subroutine.

A method for controlling an automation system with visualization of program objects of a control program of the automation system, comprises determining a pointer address of the pointer element, determining a first address offset of the pointer address, identifying a program object that is spaced apart from the first memory location of the program state by the first address offset according to the arrangement structure of the program state as a first program object, the memory address of which in the first memory area corresponds to the pointer address of the pointer element, identifying the first program object with the pointer object referenced by the pointer element, determining a fully qualified designation of the identified pointer element, and displaying the fully qualified designation of the pointer object referenced by the pointer element on a display element connected to the controller. An automation system carries out the method.

Compiling a high-level synthesis circuit design for simulation includes analyzing, using computer hardware, a kernel specified in a high-level language to detect pointers therein. A determination is made as to which of the pointers are global address space pointers referencing a global address space. The kernel is instrumented by replacing accesses in the kernel to the global address space with calls to wrapper functions for performing the accesses. A simulation kernel is generated that specifies an assembly language version of the kernel as instrumented.

Processor hardware detects when memory aliasing occurs, and assures proper operation of the code even in the presence of memory aliasing. Because the hardware can detect and correct for memory aliasing, this allows a compiler to make optimizations such as register promotion even in regions of the code where memory aliasing can occur. The result is code that is more optimized and therefore runs faster.

One or more processors determine whether a first procedure within a first program meets a first criterion. The first criterion is included in a plurality of criteria that are configured for pessimistic aliasing. Responsive to the determination, one or more processors determine whether to flag the first procedure for pessimistic aliasing.

A method for partial redundancy elimination with a fixed number of temporaries includes determining local data values of program code that describe a temporary memory location, a set of registers, and a set of basic blocks. The method determines global data values of the program code based on the determined local data values of the program code. The method removes a first load of the temporary memory location in a first basic block in the program code. The method adds a second load on a first edge from a second basic block out of the set of basic blocks to a third basic block out of the set of basic blocks in the program code. The method performs a register move on a second edge from the third basic block to the second basic block in the program code.

A method for partial redundancy elimination with a fixed number of temporaries includes determining local data values of program code that describe a temporary memory location, a set of registers, and a set of basic blocks. The method determines global data values of the program code based on the determined local data values of the program code. The method removes a first load of the temporary memory location in a first basic block in the program code. The method adds a second load on a first edge from a second basic block out of the set of basic blocks to a third basic block out of the set of basic blocks in the program code. The method performs a register move on a second edge from the third basic block to the second basic block in the program code.