An information processing apparatus includes a processor configured to: for each of a plurality of loops, acquire loop information including a number of variables, a number of registers, a number of memory commands for inputting and outputting a value of the variable between the register and a main storage device, and a number of arithmetic commands for the value of the variable stored in the register, which are used in the loop; calculate the number of variables, the number of registers, the number of memory commands, and the number of arithmetic commands, which correspond to a combination of the loops that are candidates for loop fusion, for each of the combinations of the loops;

determine a combination to which the loop fusion is to be applied among the combinations which are calculated for each of the combinations; and execute the loop fusion on the determined combination.

Optimizing runtime alias checks includes identifying, by a compiler, a base pointer and a plurality of different memory accesses based on the base pointer in a code loop; generating, by the compiler, a first portion of runtime code to determine a minimum access and a maximum access of the plurality of different memory accesses; and generating, by the compiler, a second portion of runtime code including one or more runtime alias checks for the minimum access and one or more runtime alias checks for the maximum access.

The present disclosure relates to a system and a method of optimizing scalar register allocation by a processor. The method comprises receiving an intermediate code and information about one or more available physical registers in a memory of the processor, as input. The method further comprises allocating one or more virtual registers based on the received information, wherein each virtual register is having size of each available physical register. The method also comprises mapping one or more groups of 8-bit location of the one or more virtual registers to one or more register classes. The method further comprises identifying a plurality of scalar variables from the input intermediate code, and dynamically assigning the one or more available physical registers to the identified scalar variables using the one or more register classes.

Methods for logging strings during execution of a program running on an embedded system without storing the strings in the memory of the embedded system include, during the build process, receiving source code for a program that comprises one or more log statements that identifies a string to be logged; generating object code based on the source code that comprises a special log section that includes the identified strings, and, for each log statement one or more instructions that cause a reference to the corresponding string to be stored in memory of the embedded system; generating execution code based on the object code wherein the special log section is marked as non-loadable and each reference is a location of the corresponding string in the special log section; and, loading the generated executable code into the memory of the embedded system such that the identified strings are not loaded into the memory of the embedded system.

Compiling source code objects to improve efficiency of compiling is described herein. The compiling includes determining, by a compiler, an object type of a to-be-compiled object in source code. A counter is set for the to-be-compiled object. When the object type of the to-be-compiled object is an object type that can be operated by only one thread at one moment, the compiler sets a counter counting rule for the counter of the to-be-compiled object.

A microprocessor that includes a plurality of instruction sets and has a reduced code size is provided.

A microprocessor includes a plurality of instruction sets and executes a program while switching instruction sets on the basis of an instruction set switching bit that is included in an instruction code having been read in and represents an instruction set that should be executed next at the time of execution of the program. Each instruction set includes a set of collected instruction codes that are to be used when each intermediate language instruction that is classified in accordance with a process content is executed. Then, for each instruction set, instruction sets that are possible to be selected and should be executed next are limited in an instruction code.

An information processing apparatus according to an embodiment includes: a creation processing unit which creates information indicating a message structure based on which a length of a memory area to be secured in a stack area of a virtual address space assigned for a serialization process is determined during compilation; a serialization processing unit which performs a serialization process to serialize data from a device and write the serialized data into a data storage device using the information created by the creation processing unit; and a deserialization processing unit which reads the serialized data written into the data storage device and deserializes the read data using the information created by the creation processing unit.

An apparatus including a first memory area and a second memory area is provided with a control method including specifying one or a plurality of types of image processing to be applied in the first memory area, specifying a size of obtainment target image data as a predetermined size based on a memory capacity of the second memory area and a content of the specified one or plurality of types of image processing; and obtaining first divided image data having the specified predetermined size in predetermined image data.

A first instance of a managed runtime environment is provided. An optimized version of a code unit and a corresponding set of one or more speculative assumptions are received at the first instance of the managed runtime environment, wherein the optimized version of the code unit produces the same logical results as the code unit unless at least one of the set of one or more speculative assumptions is not true, and wherein the optimized version of the code unit and the corresponding set of one or more speculative assumptions are generated by an entity that is different from the first instance of the managed runtime environment. The optimized version of the code unit is executed at the first instance of the managed runtime environment. Whether the set of one or more speculative assumptions hold true is monitored at the first instance of the managed runtime environment.

A system includes a memory and a processor in communication with the memory. The processor is configured to, prior to runtime, process application metadata for an application. The application metadata is classified into a first class used only for deployment, a second class used only for runtime, and a third class used for both runtime and deployment. Responsive to processing the application metadata, the processor is configured to build a deployment model from the processed application metadata. Prior to runtime, the processor is configured to generate an intermediate representation of the application from the deployment model. The intermediate representation of the application includes direct calls for classes associated with the second class of metadata and the third class of metadata.