Patent classifications
G06F9/30083
Hardware apparatuses and methods to perform transactional power management
Methods and apparatuses relating to transactional power management are described. In one embodiment, a hardware apparatus includes a hardware processor having a core, a plurality of power domains to transition to one of a plurality of power states in response to a power management command for each power domain, and a power transaction unit to assign a first power management command as a first power transaction and a second power management command as a second power transaction for concurrent execution, perform a commit of the first power transaction and the second power transaction when there is no conflict between the first power transaction and the second power transaction, and perform an abort of the first power transaction and a commit of the second power transaction when there is a conflict between the first power transaction and the second power transaction.
Performing local power gating in a processor
In an embodiment, the present invention includes an execution unit to execute instructions of a first type, a local power gate circuit coupled to the execution unit to power gate the execution unit while a second execution unit is to execute instructions of a second type, and a controller coupled to the local power gate circuit to cause it to power gate the execution unit when an instruction stream does not include the first type of instructions. Other embodiments are described and claimed.
PERFORMANCE SCALING FOR BINARY TRANSLATION
Embodiments relate to improving user experiences when executing binary code that has been translated from other binary code. Binary code (instructions) for a source instruction set architecture (ISA) cannot natively execute on a processor that implements a target ISA. The instructions in the source ISA are binary-translated to instructions in the target ISA and are executed on the processor. The overhead of performing binary translation and/or the overhead of executing binary-translated code are compensated for by increasing the speed at which the translated code is executed, relative to non-translated code. Translated code may be executed on hardware that has one or more power-performance parameters of the processor set to increase the performance of the processor with respect to the translated code. The increase in power-performance for translated code may be proportional to the degree of translation overhead.
SYSTEM AND METHOD FOR INTELLIGENT MULTI-APPLICATION AND POWER MANAGEMENT FOR MULTIMEDIA COLLABORATION APPLICATIONS
A method and system for intelligent collaboration multi-application and power management for an information handling system may comprise joining a videoconference session with multiple participants via a multimedia multi-user collaboration application (MMCA), detecting power connections or battery levels and detecting a current processor consumption by the multimedia multi-user collaboration application and a current MMCA processor settings, and to output from a trained neural network an optimized processor utilization instruction, an optimized A/V processing instruction adjustment, and an optimized media capture instruction adjustment predicted to decrease the power consumed by one or more processors executing code instructions of the MMCA during the videoconference session to fall below the preset power consumption threshold value when applicable. The system and method determining, via a trained neural network, software execution prioritization of other software applications concurrently operating with the MMCA and allocating processing resources or display user interfaces according to priority during a videoconference.
Proactive Di/Dt voltage droop mitigation
Embodiments include a method comprising identifying, by an instruction scheduler of a processor core, a first high power instruction in an instruction stream to be executed by an execution unit of the processor core. A pre-charge signal is asserted indicating that the first high power instruction is scheduled for execution. Subsequent to the pre-charge signal being asserted, a voltage boost signal is asserted to cause a supply voltage for the execution unit to be increased. A busy signal indicating that the first high power instruction is executing is received from the execution unit. Based at least in part on the busy signal being asserted, de-asserting the voltage boost signal. More specific embodiments include decreasing the supply voltage for the execution unit subsequent to the de-asserting the voltage boost signal. More Further embodiments include delaying asserting the voltage boost signal based on a start delay time.
Guest operating system wake-up method, device, electronic apparatus, and readable medium
A Guest Operating System wake-up method, device, electronic apparatus, and a computer readable medium, which are applicable to an intelligent terminal, the intelligent terminal includes a Host Operating System and at least one Guest Operating System is provided. The method includes: determining an operating mode of the Guest Operating System after obtaining network data having the Guest Operating System as its destination address, wherein the operating mode is a suspended mode or an active mode; generating a wake-up request when the operating mode of the Guest Operating System is the suspended mode; and enabling the Guest Operating System to enter into the active mode according to the wake-up request so as to respond to the network data. The Guest Operating System enables accurate and efficient responses to network data transmission in the multi-system environment, thereby reducing reduce resource consumption and enhance user experience.
METHOD AND SYSTEM FOR POWER SUPPLY CONTROL
A system and apparatus comprise at least one power supply connected to a terminal bloc, an I/O system configured to receive instructions provided to the control system, a control block connected to the I/O system wherein the instructions provided to the I/O system are converted to a serial output; and a puck connected to the serial output and configured to receive power from the terminal block, to process the serial output, and to output a current.
Adaptive metadata refreshing
Techniques are described for managing the optimized refreshing of metadata associated with online and live systems. In some implementations, a set of metadata modules associated with one or more entities are identified, the metadata modules defining metadata associated with a particular data model for the associated entities. A request to initiate a refreshing of the metadata for a subset of the set of metadata modules is identified. Each metadata module from the subset of the set of metadata modules is prioritized into a prioritization order. A determination is made as to whether two or more idle database connections are available. In response to determining that two or more idle database connections are available, a concurrent refresh of the subset of the set of metadata modules is initialized in the prioritization order.
Computing system and method
A datacenter including a first voltage sensor and/or first amperage sensor along with a second voltage sensor and/or second amperage sensor. The first amperage and voltage sensors are associated with a first computing device (FCD) and the second amperage and voltage sensors are associated with a second computing device (SCD). The datacenter also includes an electronic control unit (ECU) that communicates with the FCD and the SCD. The ECU is configured to receive FCD energy consumption information and additional updated FCD energy consumption information via the first voltage and/or amperage sensor(s). FCD energy consumption information is associated with energy consumed by the FCD during a first customer billing cycle. The ECU is also configured to divide a first blockchain mining reward into a first customer portion and a first datacenter portion and withhold the first customer portion when the first datacenter portion is less than a first minimum threshold.
Adjustable power capacity power supply unit (PSU) system and method
According to one embodiment, an adjustable power capacity Power Supply Unit (PSU) includes a circuit coupled within a feedback loop of the PSU that is controlled by an internal processing system. The feedback loop configured to carry a feedback signal for regulating an output power of the PSU. The processing system includes executable instructions that may be executed to receive an output power capacity set point that represents a programmed output power rating of the PSU, and control the circuit to modify the feedback signal so that the PSU generates output power at the programmed output power rating. The programmed output power rating set on the PSU being less than an actual output power rating of the PSU.