G06F9/4408

Data processing method and electronic device

Embodiments of the present disclosure provide a data processing method and an electronic device. The method is applied in an electronic device, the electronic device being configured with a CPU and a UEFI BIOS; the CPU comprising at least two executing cores each capable of executing one thread; the method comprising: obtaining a first instruction for backup/recovery of designated data when the UEFI BIOS is started to run; invoking a second executing core of the CPU based on the first instruction; and executing the backup/recovery of the designated data by the UEFI BIOS and the second executing core, wherein the UEFI BIOS is run by a first executing core of the CPU.

METHOD FOR OPERATING AN ELECTRONIC DATA PROCESSING SYSTEM AND ELECTRONIC DATA PROCESSING SYSTEM

A method is disclosed for operating an electronic data processing system (10) operable under an operating system. The electronic data processing system has a boot system (13) for selectively loading an operating system from one of a plurality of storage media (12, 30). The boot system is accessible to an external user after the user executes an identification protocol with the boot system. The identification protocol is a challenge-response protocol based on a challenge generated by the boot system. More particularly, the challenge is randomly generated by the boot system and communicated to the user in an outgoing message and the user generates a response to the challenge as an incoming message to the boot system. A specific application is related to an electronic data processing system, and to a weighing scale (1), where the authentication system includes the electronic data processing system.

READ PREDICTION DURING A SYSTEM BOOT PROCEDURE
20210373907 · 2021-12-02 ·

Methods, systems, and devices for read prediction during a system boot procedure are described. A memory device may identify a command for a boot procedure and transfer data stored in a memory array to a cache of the memory device. In some cases, the memory device may prefetch data used during the boot procedure and thereby improve the latency of the boot procedure. When the memory device receives a command that requests data stored in the memory array as part of the boot procedure, the memory device may identify a cache hit based on prefetching the requested data before the command is received. In such cases, the memory device may retrieve the prefetched data from the cache.

System on chip for reducing wake-up time, method of operating same, and computer system including same
11372472 · 2022-06-28 · ·

A system on chip (SoC) includes an internal read-only memory (ROM) configured to store a first boot loader; a first internal static random access memory (SRAM) configured to receive a second boot loader output from a booting device, store the second boot loader, and perform a booting sequence according to control of the first boot loader; a second internal SRAM configured to receive a third boot loader output from the booting device, store the third boot loader, and perform a wake-up sequence according to control of the first boot loader; and a dynamic random access memory (DRAM) controller configured to load an operating system (OS) from the booting device into a DRAM according to control of the second boot loader.

Computing device login failsafe

A method for accessing a computing device including launching a first operating system having a bootloader to boot a second operating system into a random-access memory on the computing device, the first operating system and the second operating system having access to an administrator password contained in an administrator password file located in a persistent file of the computing device and booting the second operating system from the first operating system bootloader to populate a filesystem into the second operating system. Also, executing a login failsafe by the second operating system to read the administrator password contained in the administrator password file located in the persistent file and installing the administrator password file in the filesystem of the second operating system by the login failsafe. The method further including failing to complete the booting of the second operating system and allowing access to the computing device through an administrator user account protected by the administrator password when the second operating system fails to complete the booting.

Instant messaging communication system and method

Systems and methods for delivering media files in communication sessions are disclosed. User interfaces are displayed on first and second client devices. A media file is selected at the first client device and a representation of the media file is transmitted to the second client device. The representation is selectable within a sent message region of the user interface on the second client device. In response to selecting the representation of the media file, an embedded viewer is launched within the sent message region of the user interface of the second client device that includes embedded selectable controls which, when activated, control viewing or playback of the media file within the user interface.

Data center management with rack-controllers

Provided is a process, including: receiving, with a rack-controller, via a first network, an application program interface (API) request; based on the API request, selecting, with the rack-controller, one of a plurality of routines to effectuate control via the second network of at least some of the plurality of rack-mounted computing devices; executing, with the rack-controller, the selected routine and, as a result, sending one or more commands via the second network encoded in a second protocol different from the first protocol to effectuate an action indicated by the API request.

Unavailable memory device initialization system
11347520 · 2022-05-31 · ·

An unavailable memory device initialization system includes a memory controller device that is configured to determine whether a memory system includes unavailable memory devices during initialization operations. During the first initialization operations, a BIOS engine identifies unavailable memory device(s) in the memory system that were determined to be unavailable by the memory controller device during the first initialization operations and, in response, stores respective unavailable memory device identifier(s) associated with each unavailable memory device in a non-volatile storage subsystem. Subsequently, during second initialization operations and based on the respective unavailable memory device identifier(s) stored in the non-volatile storage subsystem, the BIOS engine generates a memory overlay that hides each unavailable memory device from the memory controller device such that the memory controller device determines that the memory system does not include any unavailable memory devices during the second initialization operations.

Systems and methods for enforcing update policies while applying updates from bootable image file

An information handling system may include a host system processor and a computer-readable storage medium communicatively coupled to the host system processor and having stored thereon a bootable update image file for performing a firmware update associated with the information handling system. The bootable update image file may be configured to, when read and executed by the processor, read policy settings stored within the information handling system setting forth update policies to be applied during application of updates defined within the bootable update image file and perform updates defined within the bootable update image file in accordance with the update policies.

System and method to run basic input/output system code from a non-volatile memory express device boot partition

An information handling system may include an embedded controller, a serial peripheral interface (SPI) read-only memory (ROM) device to store a first basic input/output system (BIOS) firmware for the information handling system, and a non-volatile memory device includes a boot partition to store a second BIOS firmware. The embedded controller detects a failure during a boot process, switches a first SPI of a chipset from the SPI ROM to the embedded controller and executes the second BIOS firmware from the non-volatile memory device via a sideband access of the non-volatile memory device.