Patent classifications
G06F9/449
METHOD FOR GENERATING A BINDING BETWEEN A C/C++ LIBRARY AND AN INTERPRETED LANGUAGE, AND CARRYING OUT SAID METHOD TO TRANSFORM A THREE-DIMENSIONAL (3D) MODEL
The present disclosure relates to a method for generating a binding between a C/C++ library and one or more interpreted high-level languages, in order to expose the functionalities of the C/C++ library to this or these high-level languages, involving the following steps: a step of writing a definition of the binding in the form of a high-level language, a step of processing this definition in order to produce binding elements, a step of grouping the binding elements around each of the high-level language(s) to produce a C++ binding code, and a step of compiling the C++ code and linking this to the C/C++ library. This can be used, in particular, to implement human-machine interfaces for terrestrial, aerial or maritime mobile equipment.
Modular electronic warfare framework for multi-core execution
A modular electronic warfare (EW) framework that is implemented into a first preexisting EW system with associated hardware and firmware to leverage the capabilities of the first preexisting EW system into a second, different preexisting EW system with associated hardware and firmware. The modular EW framework includes a tracking framework and a logic framework. The tracking framework is configured to receive a first set of objects from a preexisting EW system and augments the first set of objects with at least one parameter and outputs the second set of objects. The logic framework is configured to receive the set of second objects from the tracking framework and implements at least one process onto the second set of objects and outputs a third set of objects. A multi-core processor is used to operate the modular EW framework. The multi-core processor is configured to execute the at least one parameter to output the second set of objects and configured to execute the at least one process to output the third set of objects The first set of objects in the fixed EW system remains unaffected within the fixed EW system. The first set of objects is different than the second and third sets of objects. The modular EW framework is also platform-agnostic and can be implemented with a broad suite of computer processing units and operating systems. Each of the tracking framework and the logic framework of the modular EW framework are asynchronous.
Hardware apparatuses, methods, and systems for individually revocable capabilities for enforcing temporal memory safety
Systems, methods, and apparatuses relating to circuitry to implement individually revocable capabilities for enforcing temporal memory safety are described. In one embodiment, a hardware processor comprises an execution unit to execute an instruction to request access to a block of memory through a pointer to the block of memory, and a memory controller circuit to allow access to the block of memory when an allocated object tag in the pointer is validated with an allocated object tag in an entry of a capability table in memory that is indexed by an index value in the pointer, wherein the memory controller circuit is to clear the allocated object tag in the capability table when a corresponding object is deallocated.
Class unloading method and electronic device
A class unloading method comprises: loading, by an electronic device, n classes after an application is started, where n is a positive integer; generating a reference mapping table, where the reference mapping table includes a reference relationship between the n classes and m class objects corresponding to the n classes and a dependency relationship between the m class objects corresponding to the n classes, the dependency relationship is used to represent an interdependency mapping relationship between different class objects, and m is a positive integer greater than or equal to n; and unloading a first class of the n classes based on the reference mapping table in an operation process of the application.
Hardware apparatuses, methods, and systems for individually revocable capabilities for enforcing temporal memory safety
Systems, methods, and apparatuses relating to circuitry to implement individually revocable capabilities for enforcing temporal memory safety are described. In one embodiment, a hardware processor comprises an execution unit to execute an instruction to request access to a block of memory through a pointer to the block of memory, and a memory controller circuit to allow access to the block of memory when an allocated object tag in the pointer is validated with an allocated object tag in an entry of a capability table in memory that is indexed by an index value in the pointer, wherein the memory controller circuit is to clear the allocated object tag in the capability table when a corresponding object is deallocated.
User exit daemon for use with special-purpose processor, mainframe including user exit daemon, and associated methods
Certain example embodiments relate to techniques for use with mainframe computing systems that include both general-purpose processors (e.g., CPs) and special-purpose processors that can be used to perform only certain limited operations (e.g., zIIPs). Certain example embodiments automatically help these special-purpose processors perform user exits and other routines thereon, rather than requiring those operations to be performed on general-purpose processors. This approach advantageously can improve system performance when executing programs including these user exits and other routines, and in a preferred embodiment, it can be accomplished in connection with a suitably-configured user exit daemon. In a preferred embodiment, the daemon and its clients can use a user exit property table or the like to communicate with one another about the state of each user exit or other routine that has been analyzed, classified, and possibly modified.
ACCESSING A MIGRATED MEMBER IN AN UPDATED TYPE
Techniques for accessing a migrated method include: identifying a request to invoke a method defined by a type, the request including one or more arguments associated with respective argument types; identifying, in the type, an older version of the method associated with (a) a method name and (b) a first set of one or more parameter types, and a current version of the method associated with (a) the method name and (b) a second set of one or more parameter types; determining that the argument type(s) match(es) the first set of one or more parameter types; responsive to determining that the argument type(s) match(es) the first set of one or more parameter types: applying one or more conversion functions to convert the argument(s) to the second set of one or more parameter types; executing the current version of the method using the converted argument(s).
ACCESSING A MIGRATED MEMBER IN AN UPDATED TYPE
Techniques for accessing a migrated method include: identifying a request to invoke a method defined by a particular type; identifying, in the particular type: an older version of the method that is (a) associated with a method name and (b) configured to return values of a first return type, and a current version of the method that is (a) associated with the method name and (b) configured to return values of a second return type; determining that the first request specifies the first return type; responsive to determining that the first request specifies the first return type: executing the current version of the method to obtain a value of the second return type; applying one or more conversion functions to convert the value of the second return type to a value of the first return type; returning the value of the first return type responsive to the first request.
Methods of hardware and software coordinated opt-in to advanced features on hetero ISA platforms
The present disclosure relates to a processor that includes one or more processing elements associated with one or more instruction set architectures. The processor is configured to receive a request from an application executed by a first processing element of the one or more processing elements to enable a feature associated with an instruction set architecture. Additionally, the processor is configured to enable the application to utilize the feature without a system call occurring when the feature is associated with an instruction set architecture associated with the first processing element.
MODULAR ELECTRONIC WARFARE FRAMEWORK FOR MULTI-CORE EXECUTION
A modular electronic warfare (EW) framework that is implemented into a first preexisting EW system with associated hardware and firmware to leverage the capabilities of the first preexisting EW system into a second, different preexisting EW system with associated hardware and firmware. The modular EW framework includes a tracking framework and a logic framework. The tracking framework is configured to receive a first set of objects from a preexisting EW system and augments the first set of objects with at least one parameter and outputs the second set of objects. The logic framework is configured to receive the set of second objects from the tracking framework and implements at least one process onto the second set of objects and outputs a third set of objects. A multi-core processor is used to operate the modular EW framework. The multi-core processor is configured to execute the at least one parameter to output the second set of objects and configured to execute the at least one process to output the third set of objects The first set of objects in the fixed EW system remains unaffected within the fixed EW system. The first set of objects is different than the second and third sets of objects. The modular EW framework is also platform-agnostic and can be implemented with a broad suite of computer processing units and operating systems. Each of the tracking framework and the logic framework of the modular EW framework are asynchronous.