Apparatuses, systems, and methods for low latency parity for a memory device include a controller configured to accumulate, in a memory buffer, combined parity data for a plurality of regions of memory of a memory device in response to write operations for the plurality of regions of memory. The controller is configured to perform a recovery operation for a region of memory in response to determining that a latency setting for the region satisfies a latency threshold. The controller is configured to service a read request for data from the region based on a recovery operation to satisfy the latency setting.

An apparatus includes an error correction component coupled to read recovery control circuitry. The error correction component can be configured to perform one or more initial error correction operations on codewords contained within a managed unit received thereto. The read recovery control circuitry can be configured to receive the error corrected codewords from the error correction component and determine whether codewords among the error corrected codewords contain an uncorrectable error. The read recovery control circuitry can be further configured to determine that a redundant array of independent disks (RAID) codeword included in the plurality of error corrected codewords contains the uncorrectable error, request that codewords among the error corrected codewords that contain the uncorrectable error are rewritten in response to the determination, and cause the plurality of error corrected codewords to be transferred to a host coupleable to the read recovery control circuitry.

Storage devices include a memory array comprised of a plurality of memory devices arranged in word lines. The word lines are further arranged within memory blocks. When erasing memory blocks, various storage devices may utilize a stripe-erase process that alternates the erasure of word lines within the memory blocks. The stripe-erase process is often carried out in multiple steps. However, an ungraceful shutdown can interrupt the erasing processing between one of these stripe-erase steps. The status of each memory device associated with the aborted erasure needs to be known before operations can continue. Methods and systems described herein properly classify and process memory blocks after an aborted erase command by analyzing both even and odd word lines within each of the memory blocks. By properly categorizing each memory block, overprogramming and other negative effects can be avoided, increasing the overall lifespan of the storage device that utilizes a stripe-erase process.

Generating datasets using approximate baselines including receiving, by a source storage system, an instruction to create, on a target storage system, a current snapshot for a source dataset stored on the source storage system, wherein no snapshots for the source dataset exist on the target storage system; selecting, as a baseline dataset, a similar dataset from a plurality of datasets on the source storage system with an existing snapshot on the target storage system, wherein the similar dataset comprises at least a portion of the source dataset; instructing the target storage system to generate a baseline snapshot for the source dataset using a copy of the existing snapshot of the baseline dataset; and transferring, from the source storage system to the target storage system, only a difference between the baseline dataset and the source dataset.

A method of error management includes, in response to a read request for first data from a first storage device of a plurality of storage devices under one or more common data protection schemes, receiving a read uncorrectable indication regarding the first data, obtaining uncorrected data and metadata of an LBA associated with the first data, and obtaining the same LBA from one or more other storage devices of the plurality. The method further includes comparing the uncorrected data with the data and metadata from the other storage devices, speculatively modifying the uncorrected data based, at least in part, on the other data to create a set of reconstructed first data codewords, and, in response to a determination that one of the reconstructed first data codewords has recovered the first data, issuing a write_raw command to rewrite the modified data and associated metadata to the first storage device.

Temporarily limiting access to a storage device, including: determining that a storage device of a plurality of storage devices in a storage system is operating outside of a defined performance range; determining that the storage device operating outside of the defined performance range may be caused by a rehabilitative action performed on the storage device; and modifying a storage operation issuance policy for one or more storage devices of the plurality of storage devices until a determination that the storage device is operating within the defined performance range.

A storage system includes a plurality of storage nodes. Each storage node of the plurality of storage nodes includes a plurality of non-volatile memory modules. The storage system also includes a processor operatively coupled to the plurality of storage nodes, to perform a method. The method includes receiving incoming data. The method further includes storing the incoming data in a redundant array of independent drives (RAID) stripe in the data storage system. The RAID stripe includes groups of data shards. Each group of data shards and a respective group parity shard are stored across the plurality of nodes of the data storage system. A set of stripe parity shards are stored in a first storage node of the plurality of storage nodes.

A computer-implemented method includes refreshing a set of memory channels in a memory system substantially simultaneously, each memory channel refreshing a rank that is distinct from each of the other ranks being refreshed. Further, the method includes marking a memory channel from the set of memory channels as being unavailable for the rank being refreshed in the memory channel. In one or more examples, the method further includes blocking a fetch command to the memory channel for the rank being refreshed in the memory channel.

Determining remaining hardware life in a storage system, including: receiving data about a plurality of hardware components including data describing the usage of each hardware component and the state of each hardware component; analyzing the data to determine a remaining hardware life for each hardware component in a group of components; and distributing workloads in order to balance wear amongst the hardware components in the group.

Systems, apparatuses, and methods related to memory bank protection are described. A quantity of errors within a single memory bank can be determined and the determined quantity can be used to further determine whether to access other memory banks to correct the determined quantity. The memory bank protection described herein can avoid a single memory bank of a memory die being a single point of failure (SPOF).