A fault tolerant multi-threaded processor uses the temporal and/or spatial separation of instructions running in two or more different threads. An instruction is fetched, decoded and executed by each of two or more threads to generate a result for each of the two or more threads. These results are then compared using comparison hardware logic and if there is a mismatch between the results obtained, then an error or event is raised. The comparison is performed on an instruction by instruction basis so that errors are identified (and hence can be resolved) quickly.

A safety thread scheduler configured to schedule a check thread for a critical thread being run on one of a plurality of execution units, the check thread being a duplicate of the critical thread, wherein the safety thread scheduler is configured to schedule the check thread to begin being run on a second one of the plurality of execution units before the end of a safety time-window for scheduling the check thread. The safety thread scheduler is further configured to allow the check thread, when the check thread is running on the second one of the plurality of execution units, to be interrupted by a further thread and to re-schedule the check thread to be resumed by expiry of a re-scheduling time limit.

A processing system includes safety thread scheduling circuitry which schedules a check thread, being a duplicate of a critical thread, to be executed on a second of a plurality of parallel execution units other than a first execution unit upon which the critical thread is run. The processor further includes comparison circuitry which will compare a result of the critical thread with a result of the check thread, and raise error signal if the results do not match. The safety thread scheduling circuitry is configured to detect when one of the execution units is idle, and if none of the execution units is detected to be idle by the expiry of a safety time-window, to interrupt a non-critical thread executing on a non-idle one of the execution units and select the non-idle execution unit as the second execution unit to execute the check thread in place of the interrupted thread.

A first processing element is configured to execute a first thread and one or more second processing elements are configured to execute one or more second threads that are redundant to the first thread. The first thread and the one or more second threads are to selectively bypass one or more comparisons of results of operations performed by the first thread and the one or more second threads depending on whether an event trigger for the comparison has occurred a configurable number of times since a previous comparison of previously encoded values of the results. In some cases the comparison can be performed based on hashed (or encoded) values of the results of a current operation and one or more previous operations.

Embodiments for debugging program code are provided. In response to a debug comparison request, (i) a first set of debugging operations are initiated on a first portion of program code selected from an original version of a program, and (ii) a second set of debugging operations are initiated on a second portion of program code selected from a revised version of the program. The second portion of program code corresponds to the first portion of program code. Execution of the first and second portions of program code is synchronized. The first and second set of debugging operations are stopped in response to determine that at least one of a first and a second stop condition exists based, at least in part, on a comparison of the results from executing one or more lines of corresponding code from the first and second portions of program code.

Embodiments for debugging program code are provided. In response to a debug comparison request, (i) a first set of debugging operations are initiated on a first portion of program code that is selected from an original version of a program, and (ii) a second set of debugging operations are initiated on a second portion of program code that is selected from a revised version of the program. The second portion of program code corresponds to the first portion of program code. Execution of the first and second portions of program code is synchronized. The first and second set of debugging operations are stopped in response to determine that at least one of a first and a second stop condition exists based, at least in part, on a comparison of the results from executing one or more lines of corresponding code from the first and second portions of program code.

A method for performing a technical process in which application programs are executed redundantly in a plurality N of computing instances and, on the basis of an MooN system, wherein M is at least two and N is at least three, a comparison of the plurality N of results of the redundant execution of the application programs is performed in a voting. When a minority of the results is different from a majority of the results with identical content, the minority is excluded during the performance of the technical process, is repaired with a state copy of one of the intact computing instances and reintegrated into the process. There is also described a computer program product and a provisioning apparatus.