Patent classifications
G06F11/1645
DISTRIBUTED REAL-TIME COMPUTER SYSTEM AND TIME-TRIGGERED DISTRIBUTION UNIT
The invention relates to a time-controlled distribution unit (30, 31) for the distribution of messages in a distributed computer system for safety-critical applications. Said distribution unit is designed as a self-testing functional unit and comprises input channels (201 . . . 222) for receiving time-controlled periodic input messages from node computers (20, 21, 22) upstream in the data flow, and output channels (301 . . . 333) for transmitting time-controlled periodic output messages to the node computers (50, 51, 52) downstream in the data flow, a computer (40) being provided in the distribution unit and being designed to analyze, by means of a “simple” software, useful information contained in the input messages, and to decide whether output messages are output and, if so, which useful information is contained in the output messages.
LOCKSTEP COMPARATORS AND RELATED METHODS
Lockstep comparators and related methods are described. An example apparatus includes self-test logic circuitry having first outputs, and comparator logic including selection logic having first inputs and second outputs, ones of the first inputs coupled to the first outputs, first detection logic having second inputs and third outputs, the second inputs coupled to the second outputs, second detection logic having third inputs and fourth outputs, the third inputs coupled to the third outputs, latch logic having fifth inputs and fifth outputs, the third output and the fourth output coupled to the fifth inputs, and error detection logic having sixth inputs coupled to the fifth inputs.
Vehicle safety electronic control system
A vehicle safety electronic control system includes a first microcontroller having a lockstep architecture with a lockstep core and a second microcontroller having at least two processing cores. The lockstep core of the first microcontroller is configured to monitor and control outputs of said at least two cores of the second microcontroller.
Service takeover method, storage device, and service takeover apparatus
The present disclosure describes example service takeover methods, storage devices, and service takeover apparatuses. In one example method, when a communication fault occurs between two storage devices in a storage system, the two storage devices respectively obtain running statuses of the two storage devices. A running status can reflect current usage of one or more system resources of a particular storage device. Then, a delay duration is determined according to the running statuses, where the delay duration is a duration for which the storage device waits before sending an arbitration request to a quorum server. The two storage devices respectively send, after the delay duration, arbitration requests to the quorum server to request to take over a service. The quorum server then can select a storage device in a relatively better running status to take over a host service.
Methods for managing communications involving a lockstep processing system
A method for managing communications involving a lockstep processing comprising at least a first processor and a second processor can include receiving, at a data synchronizer, a first signal from a first device. The method can also include receiving, at the data synchronizer, a second signal from a second device. In addition, the method can include determining, by the data synchronizer, whether the first signal is equal to the second signal. When the first signal is equal to the second signal, the method can include transmitting, by the data synchronizer, the first signal to the first processor and the second signal to the second processor. Specifically, in example embodiments, transmitting the first signal to the first processor can occur synchronously with transmitting the second signal to the second processor.
Service takeover method, storage device, and service takeover apparatus
The present disclosure describes example service takeover methods, storage devices, and service takeover apparatuses. In one example method, when a communication fault occurs between two storage devices in a storage system, the two storage devices respectively obtain running statuses of the two storage devices. A running status can reflect current usage of one or more system resources of a particular storage device. Then, a delay duration is determined according to the running statuses, where the delay duration is a duration for which the storage device waits before sending an arbitration request to a quorum server. The two storage devices respectively send, after the delay duration, arbitration requests to the quorum server to request to take over a service. The quorum server then can select a storage device in a relatively better running status to take over a host service.
Integrated circuit self-repair method and integrated circuit thereof
An integrated circuit self-repair method and an integrated circuit thereof are provided. The integrated circuit self-repair method includes: transmitting, by a main register, a predetermined logic state to at least three registers, and setting the at least three registers to the predetermined logic state; outputting, according to the predetermined logic state in the at least three registers, the predetermined logic state to drive a controlled circuit to perform a function; and when a minority of the at least three registers are changed to an opposite logic state due to an emergency occurring at an input power source, outputting the predetermined logic state according to the predetermined logic state of the remaining registers, and transmitting the predetermined logic state back to the register that is in the opposite logic state, to correct the opposite logic state to the predetermined logic state.
INTEGRATED CIRCUIT SELF-REPAIR METHOD AND INTEGRATED CIRCUIT THEREOF
An integrated circuit self-repair method and an integrated circuit thereof are provided. The integrated circuit self-repair method includes: transmitting, by a main register, a predetermined logic state to at least three registers, and setting the at least three registers to the predetermined logic state; outputting, according to the predetermined logic state in the at least three registers, the predetermined logic state to drive a controlled circuit to perform a function; and when a minority of the at least three registers are changed to an opposite logic state due to an emergency occurring at an input power source, outputting the predetermined logic state according to the predetermined logic state of the remaining registers, and transmitting the predetermined logic state back to the register that is in the opposite logic state, to correct the opposite logic state to the predetermined logic state.
Detection and isolation of faults to prevent propagation of faults in a resilient system
A resilient system implementation in a network-on-ship with at least one functional logic unit and at least one duplicated logic unit. A resilient system and method, in accordance with the invention, are disclosed for detecting a fault or an uncorrectable error and isolating the fault. Isolation of the fault prevents further propagation of the fault throughout the system. The resilient system includes isolation logic or an isolation unit that isolates the fault.
Image recognition processor including functional safety processor core and operation method thereof
Provided is an image recognition processor. The image recognition processor includes a plurality of nano cores arranged in rows and columns and configured to perform a pattern recognition operation on an input feature using a kernel coefficient in response to each instruction, an instruction memory configured to provide the instruction to each of the plurality of nano cores, a feature memory configured to provide the input feature to each of the plurality of nano cores, a kernel memory configured to provide the kernel coefficients to the plurality of nano cores, and a functional safety processor core configured to receive a result of a pattern recognition operation outputted from the plurality of nano cores to detect the presence of a recognition error, and perform a fault tolerance function on the detected recognition error.