The invention relates to this method comprising the following steps, for at least one input/output parameter: duplicating and inserting a list of graphical commands associated with said parameter within a calculation module of said chain, from a current value of said parameter, obtaining a current cyclic redundancy code associated with a current micropattern, generated by executing said at least one list, comparing said current cyclic redundancy code with a reference cyclic redundancy code stored in a dedicated memory space for a substantially identical value of said parameter within a tolerance threshold, in the event of a difference in cyclic redundancy code value, automatic sanctioning of said chain at least by suspending its execution.

The voter circuit and method determines a voted output among plural inputs each carrying circular data. To supply the voted output, a statistical average (e.g., mean or median) is computed by grouping the plural inputs into pairs, and for each pair generating a minimum angular difference by selecting the minimum of (a) the absolute difference between the pairs of inputs, and (b) the conjugate of the absolute difference between the pairs of inputs. The voted output is a statistical average generated from the minimum angular difference.

In a self-driving autonomous vehicle, a controller architecture includes multiple processors within the same box. Each processor monitors the others and takes appropriate safe action when needed, Some processors may run dormant or low priority redundant functions that become active when another processor is detected to have failed. The processors are independently powered and independently execute redundant algorithms from sensor data processing to actuation commands using different hardware capabilities (GPUs, processing cores, different input signals, etc.). Intentional hardware and software diversity improves fault tolerance. The resulting fault-tolerant/fail-operational system meets ISO26262 ASIL-D specifications based on a single electronic controller unit platform that can be used for self-driving vehicles.

The invention provides a device for controlling a vehicle module with plausible information, which contains a multicore safety processor, configured to check processed information for plausibility. A control unit for a vehicle module is also provided, which contains a power processor, the evaluated information of which is checked for plausibility via an information interface in the safety processor of the device according to the invention. A driver assistance system process is also provided, in which a control unit according to the invention is used.

A computer-implemented method of reconciling values of a feature, each value being provided by a different artificial intelligence (AI) system, by collecting logs from the different AI systems, each log including a value of the feature; identifying any discrepancy between the values. When there is any discrepancy, creating global information from the values, the global information taking into account some or all of the values. When the global information differs from the value of one of the AI systems, sending the global information to that AI system.

The voter circuit and method determines a voted output among plural inputs each carrying circular data. To supply the voted output, a statistical average (e.g., mean or median) is computed by grouping the plural inputs into pairs, and for each pair generating a minimum angular difference by selecting the minimum of (a) the absolute difference between the pairs of inputs, and (b) the conjugate of the absolute difference between the pairs of inputs. The voted output is a statistical average generated from the minimum angular difference.

The voter circuit and method determines a voted output among plural inputs each carrying circular data. To supply the voted output, a statistical average (e.g., mean or median) is computed by grouping the plural inputs into pairs, and for each pair generating a minimum angular difference by selecting the minimum of (a) the absolute difference between the pairs of inputs, and (b) the conjugate of the absolute difference between the pairs of inputs. The voted output is a statistical average generated from the minimum angular difference. The monitor circuit and method assesses validity among the plural inputs by comparing inputs in pairs, two-by-two, generating for each pair a minimum angular difference and comparing the difference to a threshold and persistence time is confirmed. The monitor declares an input invalid that is in disagreement with all other inputs paired against it.

Provided is an image recognition processor. The image recognition processor includes a plurality of nano cores each configured to perform a pattern recognition operation and arranged in rows and columns, an instruction memory configured to provide instructions to the plurality of nano cores in a row unit, a feature memory configured to provide input features to the plurality of nano cores in a row unit, a kernel memory configured to provide a kernel coefficient to the plurality of nano cores in a column unit, and a difference checker configured to receive a result of the pattern recognition operation of each of the plurality of nano cores, detect whether there is an error by referring to the received result, and provide a fault tolerance function that allows an error below a predefined level.

Systems and methods for command line voting are provided. Aspects include obtaining, by an output logic device, a plurality of memory blocks from a plurality of buffers, each of the plurality of memory blocks including two or more output commands generated from a processing circuit based on a sensor data input, generating, by a hash function, a hash value for each of the plurality of memory blocks, comparing the hash value for each of the plurality of memory blocks to determine an output memory block from the plurality of memory blocks, and outputting, to an output hardware, the two more output commands from the output memory block.

Provided is an image recognition processor. The image recognition processor includes a plurality of nano cores each configured to perform a pattern recognition operation and arranged in rows and columns, an instruction memory configured to provide instructions to the plurality of nano cores in a row unit, a feature memory configured to provide input features to the plurality of nano cores in a row unit, a kernel memory configured to provide a kernel coefficient to the plurality of nano cores in a column unit, and a difference checker configured to receive a result of the pattern recognition operation of each of the plurality of nano cores, detect whether there is an error by referring to the received result, and provide a fault tolerance function that allows an error below a predefined level.