Patent classifications
G06F11/2005
Method for Implementing Storage Service Continuity in Storage System, Front-End Interface Card, and Storage System
A method for implementing storage service continuity in a storage system includes a front-end interface detecting a status of a first storage controller. The storage system includes the front-end interface card and a plurality of storage controllers. The front-end interface card communicates with the storage controllers, and the front-end interface card communicates with a host. When the first storage controller is in an abnormal state, the front-end interface card selects a second storage controller from the storage controllers for the host to process an access request of the host.
REDIRECTING I/O COMMUNICATIONS BASED ON NETWORK TOPOLOGY
Path components associated with I/O paths between another network component and a target system may be determined, and the health of target ports on such I/O paths may be determined. Failed I/O communications may be redirected based on the determined path components and the determined health of target ports. In response to a failed I/O communication, it may be determined which of the remaining I/O paths between the host system and the storage system has the least amount of associated path components in common with the failed I/O path, and the I/O communication may be redirected on such I/O path. The redirect I/O path also may be selected based on the health ranking of target ports of the I/O paths.
Process control system with different hardware architecture controller backup
A process control system includes first type and second type controllers having different hardware architectures coupled together by a redundancy network for providing a controller pool. Primary application modules (AMs) are coupled to the controller platforms by a plant-wide network. The controller platforms are coupled by an input/output (I/O) mesh network to I/O devices to provide an I/O pool coupled to field devices coupled to processing equipment. A translating device translates states and values from one of the primary AMs running on a first type controller to generate a backup AM having an instruction set compatible with the second type controller. A controller application module orchestrator (CAMO) extends synchronization to the second type controller, makes the backup AM available to the second type controller, and then switches to utilize the second type controller as an active controller running the process.
Network addressable storage controller with storage drive profile comparison
Embodiments are directed towards a controller that provides individual network accessibility to a storage drive. The controller may include a first connector operative to couple with a storage-drive connector, a second connector operative to couple with a backplane connector of a multi-storage-drive chassis, memory, and processor. The controller may convert communication received through the first connector into an Ethernet protocol for output through the second connector, and convert communication received through the second connector into a storage-drive protocol for output through the first connector. A physical shape of the controller may fit adjacent to the storage-drive connector and occupy less space than is bounded by peripheral edges of an end of a separate housing of a storage drive coupled to the storage-drive connector. The controller may manage power provided to the storage drive and may coordinate with other controllers to manage power-up sequences of multiple storage drives.
SELECTIVE TCP/IP STACK RECONFIGURATION
A method, system, and program product are provided. A plurality of recovery groups is defined on each transmission control protocol/internet protocol (TCP/IP) stack in a cluster of servers. The recovery group includes a service, one or more IP addresses associated with the service, a trigger condition, and a recovery action. Each of the recovery groups is monitored for an occurrence of the trigger condition associated with the service. In response to detecting the trigger condition, a backup TCP/IP stack is notified to automatically perform the recovery action defined for a failing recovery group on an owning TCP/IP stack. Only the failing recovery group is recovered and the remaining recovery groups execute uninterrupted.
SEMICONDUCTOR DEVICE AND METHOD FOR PROTECTING BUS
The master interface generates copy data by copying the first data, and generates an error detection code based on the copy data. The protocol conversion unit generates the second data by converting the first data from the first protocol to the second protocol. The slave interface detects errors in the copy data based on the error detection code. The slave interface also generates the first verification data by performing a conversion from one of the first protocol or the second protocol to the other for one of the second data or copy data. In addition, the slave interface compares the second verification data with the first verification data, using the other of the second data or copy as the second verification data.
Yield tolerance in a neurosynaptic system
Embodiments of the invention provide a neurosynaptic network circuit comprising multiple neurosynaptic devices including a plurality of neurosynaptic core circuits for processing one or more data packets. The neurosynaptic devices further include a routing system for routing the data packets between the core circuits. At least one of the neurosynaptic devices is faulty. The routing system is configured for selectively bypassing each faulty neurosynaptic device when processing and routing the data packets.
Bundling of wired and wireless interfaces in a redundant interface of a high-availability cluster
A system may include a first node in a high-availability cluster; a second node in the high-availability cluster; a redundant interface between a network device and both the first node and the second node, wherein the redundant interface is associated with a redundancy group that designates one of the first node or the second node as a primary node in the high-availability cluster and that designates the other of the first node or the second node as a backup node in the high-availability cluster; a wireless interface of the first node, wherein the wireless interface is included in the redundant interface; and a wired interface of the second node, wherein the wired interface is included in the redundant interface.
Identification of a suspect component causing an error in a path configuration from a processor to IO devices
An apparatus stores path configuration information specifying a first path configuration and a second path information each of which indicates a target path configuration from a target processor to IO devices. When an error is detected from among the IO devices in a state where the target path configuration is the first path configuration, the apparatus changes the first path configuration to the second path configuration. When an error is detected from among the IO devices under the second path configuration, the apparatus identifies a suspect component included in the target path configuration, based on a comparison result of comparison between a first IO device whose error has been detected under the first path configuration, and a second IO device whose error has been detected under the second path configuration.
All flash array server and control method thereof
The present invention provides a control method of a server, wherein the control method includes the steps of: periodically controlling a first register and a second register of a first node to have a first value and a second value, respectively; periodically controlling a third register and a fourth register of a second node to have a third value and a fourth value, respectively; controlling the first register and the fourth register to synchronize with each other, wherein the first value is different from the fourth value; controlling the second register and the third register to synchronize with each other, wherein the second value is different from the third value; and periodically checking if the third register has the third value and the fourth register has the fourth value to determine if the first node fails to work.