G06F11/2043

INCREMENTAL FILE SYSTEM BACKUP USING A PSEUDO-VIRTUAL DISK
20220261315 · 2022-08-18 ·

Methods and systems for backing up and restoring sets of electronic files using sets of pseudo-virtual disks are described. The sets of electronic files may be sourced from or be stored using one or more different data sources including one or more real machines and/or one or more virtual machines. A first snapshot of the sets of electronic files may be aggregated from the different data sources and stored using a first pseudo-virtual disk. A second snapshot of the sets of electronic files may be aggregated from the different data sources subsequent to the generation of the first pseudo-virtual disk and stored using the first pseudo-virtual disk or a second pseudo-virtual disk different from the first pseudo-virtual disk.

Mapping of data storage system for a redundant array of independent nodes

Described herein, system that facilitates mapping of redundant array of independent nodes of a storage device. According to an embodiment, a system can comprise generating a first configuration of a storage cluster, wherein the storage cluster comprises a group of nodes and a group of disks, generating a second configuration of the storage cluster using the first configuration, wherein the group of nodes are divided into a first pair of nodes comprising a first node having access to a first group of disks and a second node having access to a second group of disks, and generating a third configuration of the storage cluster using the second configuration, wherein the first node comprises a first mapped node that manages the first group of disks of the first node and enables access to the second group of disks of the second node.

Systems and methods for in-field core failover

A multicore processor may include multiple processing cores that were previously designated as active cores and at least one processing core that was previously designated as a functional spare. The processor may include an interface to receive, during operation of the processor in an end-user environment, a request to change the designation of at least one of the processing cores. The processor may be to store, into a desired cores configuration data structure in response to the request, data representing a bitmask that reflects the requested change, and to execute a reset sequence. During the reset sequence, the processor may activate, dependent on the bitmask, a processing core previously designated as a functional spare, or may deactivate, dependent on the bitmask, a processing core previously designated as an active core. The processor may include a predetermined maximum number of active cores and a predetermined minimum number of functional spares.

Validation of data written via two different bus interfaces to a dual server based storage controller

A first server of a storage controller is configured to communicate with a host via a first bus interface, and a second server of the storage controller is configured to communicate with the host via a second bus interface. Data is written from the host via the first bus interface to a cache of the first server and via the second bus interface to a non-volatile storage of the second server. The data stored in the cache of the first server is periodically compared to the data stored in the non-volatile storage of the second server.

Server recovery from a change in storage control chip

A method comprises configuring an address-to-SC unit (A2SU) of each of a plurality of CPU chips based on a number of valid SC chips in the computer system. Each of the plurality of CPU chips is coupled to each of the SC chips in a leaf-spine topology. The A2SU is configured to correlate each of a plurality of memory addresses with a respective one of the valid SC chips. The method further comprises, in response to detecting a change in the number of valid SC chips, pausing operation of the computer system including operation of a cache of each of the plurality of CPU chips; while operation of the computer system is paused, reconfiguring the A2SU in each of the plurality of CPU chips based on the change in the number of valid SC chips; and in response to reconfiguring the A2SU, resuming operation of the computer system.

CONTROL SYSTEM FOR AUTONOMOUS VEHICLE
20220289212 · 2022-09-15 ·

A control system for a vehicle includes a time sensitive network switch and one or more processors. The time sensitive network switch is configured to receive sensor data from light detection and ranging (LIDAR) sensors, radio detection and ranging (RADAR) sensors, or image sensors. The sensor data is representative of estimated objects that are in an external environment of the autonomous vehicle. The one or more processors are configured to receive the sensor data and determine instructions to control movement of the autonomous vehicle at least partially based on the sensor data from the time sensitive network switch and at least partially based on map data.

Data storage device and method for sharing memory of controller thereof
11334415 · 2022-05-17 · ·

A data storage device and a method for sharing memory of controller thereof are provided. The data storage device comprises a non-volatile memory and a controller, which is electrically coupled to the non-volatile memory and comprises an access interface, a redundant array of independent disks (RAID) error correcting code (ECC) engine and a central processing unit (CPU). The CPU has a first memory for storing temporary data, the RAID ECC engine has a second memory, and the controller maps the unused memory space of the second memory to the first memory to be virtualized as part of the first memory when the second memory is not fully used so that the CPU can also use the unused memory space of the second memory to store the temporary data.

TRANSPARENT DYNAMIC REASSEMBLY OF COMPUTING RESOURCE COMPOSITIONS

Systems and techniques for transparent dynamic reassembly of computing resource compositions are described herein. An indication may be obtained of an error state of a component of a computing system. An offload command may be transmitted to component management software of the computing system. An indication may be received that workloads to be executed using the component have been suspended. An administrative mode command may be transmitted to the component. The administrative mode command may place the component in partial shutdown to prevent the component from receiving non-administrative workloads. Data of the component may be synchronized with a backup component. Workloads from the component may be transferred to the backup component. An offload release command may be transmitted to the software of the computing system.

FAULT REPAIR METHOD FOR DATABASE SYSTEM, DATABASE SYSTEM, AND COMPUTING DEVICE
20220066886 · 2022-03-03 ·

The present disclosure relates to fault repair methods for a database system. In one example method, when working normally, a master node backs up, to a global buffer pool (GBP) node by using a data transmission protocol with a low latency and a high throughput (for example, a remote direct memory access (RDMA) protocol), a modified page generated because of transaction modification. When the master node is faulty, a standby node does not need to replay all remaining replay logs that are not replayed, but only needs to replay redo logs corresponding to a page that does not exist on the GBP node and pages that are not sequentially arranged and obtain the pages.

METHOD AND APPARATUS FOR PERFORMING NODE INFORMATION EXCHANGE MANAGEMENT OF ALL FLASH ARRAY SERVER
20220066889 · 2022-03-03 · ·

A method and apparatus for performing node information exchange management of an all flash array (AFA) server are provided. The method may include: utilizing a hardware manager module among multiple program modules running on any node of multiple nodes of the AFA server to control multiple hardware components in a hardware layer of the any node, for establishing a Board Management Controller (BMC) path between the any node and a remote node among the multiple nodes; utilizing at least two communications paths to exchange respective node information of the any node and the remote node, to control a high availability (HA) architecture of the AFA server according to the respective node information of the any node and the remote node, for continuously providing a service to a user of the AFA server; and in response to malfunction of any communications path, utilizing remaining communications path(s) to exchange the node information