Techniques and systems for detecting leakage of computing resources in cloud computing architectures are described. In some implementations, first data may be obtained that indicates usage of a computing resource, such as non-volatile memory, volatile memory, processor cycles, or network resources, by a group of computing devices included in a cloud computing architecture. The first data may be used to determine reference data that may include a distribution of values of usage of the computing resource by the group of computing devices. Second data may also be collected that indicates usage of the computing resource by the group of computing devices during a subsequent time frame. The second data may be evaluated against the reference data to determine whether one or more conditions indicating a leak of the computing resource are satisfied.

A performance influence involved in system transition is evaluated in consideration of a timer set for each processing section. An evaluation device 1 includes a storage device 10 that stores processing section data 11 in which a maximum time from start to expiration of a timer is associated with an identifier of a processing section in which the timer is set, an average waiting time calculating unit 21 that calculates an average waiting time of a service request based on a turnaround time necessary for processing in the accumulation device 4 for each processing section, and as evaluation unit 22 that evaluates that data used in the processing section is not separable to the accumulation device 4 when the maximum time of the timer set in the processing section is less than the sum of the average waiting time and a traffic amount per unit time.

In a method of operating a multi-core system comprising a plurality of processor cores, a plurality of task stall information respectively corresponding to a plurality of tasks are provided by monitoring a task stall time with respect to each task. The task stall time indicates a time while the each task is suspended within a task active time, and the task active time indicates a time while a corresponding processor core is occupied by the each task. Task scheduling is performed based on the plurality of task stall information, and a fine-grained dynamic voltage and frequency scaling (DVFS) is performed based on the task scheduling. The plurality of tasks may be assigned to the plurality of processor cores based on load unbalancing, and the effects of the fine-grained DVFS may be increased to reduce the power consumption of the multi-core system.

A method for displaying rich media content through a user interface of a communication device. A first user interaction with the user interface is detected and it is determined, based partly upon detection of the first user interaction, that a first Activity of a plurality of Activities is finishing. An Overlay containing the media content is then rendered on the device display. The Overlay is associated with a backing Activity, the device operating system delaying execution of the backing Activity during a delay period initiated in response to the first user interaction. The method further includes inhibiting Activity-supported functionality of the Overlay facilitated by the backing Activity. A context object associated with the Overlay is created to contain an Activity context associated with a state of the Overlay during the delay period. The Activity context is transferred to the backing Activity and Activity-supported functionality of the Overlay enabled.

Novel tools and techniques are provided for implementing virtual machine (“VM”) management, and, more particularly, to methods, systems, and apparatuses for implementing VM management using hardware compression. In various embodiments, a computing system might identify one or more first virtual machines (“VM's”) among a plurality of VM's that are determined to be currently inactive and might identify one or more second VM's among the plurality of VM's that are determined to be currently active. The computing system might compress a virtual hard drive associated with each of the identified one or more first VM's that are determined to be currently inactive. The computing system might also perform or continue to perform one or more operations using each of the identified one or more second VM's that are determined to be currently active.

A supervisory control system provides power management in an electronic device by providing timeout periods for a hardware component to lower levels of the operating system such as a power management arbitrator and/or a hardware interface controller. The power management arbitrator and/or hardware interface controller transition at least a portion of a hardware component to a lower-power state based on monitored activity information of the hardware component. The supervisory control system may further provide wakeup periods to the power management arbitrator and/or a hardware interface controller to determine whether the hardware component should be transitioned to a higher-power state at the end of the wakeup period if the hardware component satisfies a transition condition.

An electronic apparatus includes a memory configured to store data corresponding to a neural network model, a neural network accelerator including a buffer configured to temporarily store the data corresponding to the neural network model, and a core configured to perform a computation on the neural network model based on the data stored in the buffer, and a processor configured to determine a plurality of combinations including fused layers and non-fused layers based on a method of selecting and fusing adjacent layers of the neural network model, based on a capacity of the buffer, determine a size of a tile capable of being processed in one computation in the core to acquire feature values output by the fused layers and the non-fused layers, and based on a first memory usage and computation time for storing the feature values in the buffer, determine whether to store the feature values in the memory.

This application relates to apparatus and methods for the monitoring of nodes within datacenters. In some examples, a computing device, such as a node, receives a monitoring file from a monitoring server, where the monitoring file includes a plurality of node health checks. The computing device is configured to execute the monitoring file based on a type of the computing device. Further, and based on the execution of the monitoring file, the computing device is configured to determine that at least one of the plurality of node health checks failed. In response to determining that the at least one of the plurality of node health checks failed, the computing device is configured to generate an alert message identifying the node health checks that failed. Further, the computing device is configured to transmit the alert message to the monitoring server for display.

Methods, systems, and computer-readable storage media for receiving a set of timeseries, each timeseries in the set of timeseries representing a parameter of execution of the system, pre-processing each timeseries in the set of timeseries to provide a set of pre-processed timeseries, merging timeseries in the set of timeseries to provide a merged timeseries, generating a consolidated timeseries based on the merged timeseries and a periodicity, deriving a pattern based on the consolidated time series, the pattern defining a scaling factor for each period in a timeframe, and executing, by an instance manager, scaling of the system based on the pattern to selectively scale one or more of instances of the system and controllable resources based on scaling factors of the pattern.

A method and apparatus for estimating execution time of a neural network are provided, the method of estimating execution time of a neural network in a multi-core accelerator, the method including generating trace information including operation timing information for each core of the multi-core accelerator, and calculating the execution time of the neural network reflecting communication overhead between cores of the multi-core accelerator and memory access time for each core of the cores, based on the trace information.