A mobile device (100) includes a processing device (140), a random access memory, RAM, (150) and an embedded mass storage device (160). A first interface (IF1) is provided between the processing device (140) and the RAM (150). The first interface (IF1) supports access of the processing device (140) to the RAM (150). The mass storage device (160) includes a controller (170) and a non-volatile flash memory (180). A second interface (IF2) is provided between the controller (170) and the flash memory (180). The second interface (IF2) supports access of the controller (170) to the flash memory (180). A third interface (IF3) is provided between the controller (170) and the processing device (140). The third interface (IF3) supports access of the controller (170) to the RAM (150).

An operating method is for a memory device which controls a nonvolatile memory. The operating method includes managing a program depth bit map indicating an upper page program state of each of a plurality of word lines of the nonvolatile memory in response to an external write request, and outputting one of a plurality of different read commands to the nonvolatile memory based on information of the program depth bit map corresponding to a word line to be accessed in response to an external read request.

A method of failure mapping is provided. The method includes determining that a non-volatile memory block in the memory has a defect and generating a mask that indicates the non-volatile memory block and the defect. The method includes reading from the non-volatile memory block with application of the mask, wherein the reading and the application of the mask are performed by the non-volatile solid-state storage.

A method of operating a data storage device includes programming non-fully programmed memory blocks at a point in time when a reference time elapses from a point in time when each of the memory blocks is physically erased, acquiring a first interval and a second interval, calculating a disturb index based on the first interval and the second interval, selecting a victim block for garbage collection based on the disturb index, and copying valid page data of the victim block into a free block. The first interval is defined by a point in time when each of the memory blocks is physically erased and a point in time when each of the memory blocks is fully programmed. The second interval is an interval during which a fully programmed state is maintained after a point in time when each of the memory blocks is fully programmed.

An embodiment for operation of an emulated electrically erasable (EEE) memory system includes a memory controller configured to identify a first quick record of a stack of quick records as a present record, wherein the stack of quick records are stored in a non-volatile portion of memory, the first quick record has a quick record status identifier (ID) that indicates the stack of quick records has not been qualified, determine a record status of a next record after the present record in the non-volatile portion of memory, and in response to a determination that the next record has a blank record status ID: update the next record from the blank record status ID to the quick record status ID, wherein the blank record status ID indicates that the next record is part of the stack of quick records, and qualify the present record using the plurality of program steps.

A storage management method and a storage management apparatus are provided. In some embodiments, the method includes: detecting, during a preset length of time, a writing amount per time unit of service data of a target network service in a target storage; retrieving a correspondence relationship between the writing amount per time unit and an amount of a redundant storage, wherein the relationship indicates the amount of the redundant storage increases with the increasing of the writing amount per time unit; determining a first amount of the redundant storage corresponding to the first writing amount per time unit according to the correspondence relationship; and configuring the redundant storage for the target network service in accordance with the first amount of the redundant storage.

An apparatus is described. The apparatus can include non-volatile memory, an embedded processor, and a memory controller. The memory controller can access data from the byte addressable non-volatile memory using at least one of: a first addressing scheme or a second addressing scheme. The memory controller can provide the data to a host system over a first interface when the data is accessed using the first addressing scheme. The memory controller can provide the data to the embedded processor over a second interface when the data is accessed using the second addressing scheme.

A memory component includes a memory core comprising dynamic random access memory (DRAM) storage cells and a first circuit to receive external commands. The external commands include a read command that specifies transmitting data accessed from the memory core. The memory component also includes a second circuit to transmit data onto an external bus in response to a read command and pattern register circuitry operable during calibration to provide at least a first data pattern and a second data pattern. During the calibration, a selected one of the first data pattern and the second data pattern is transmitted by the second circuit onto the external bus in response to a read command received during the calibration. Further, at least one of the first and second data patterns is written to the pattern register circuitry in response to a write command received during the calibration.

According to an embodiment, when a storage status of a first storage unit is recognized as a protected state, a control unit writes data to a second storage unit. When a read target address is recorded in a data migration log area, the control unit reads data from the second storage unit. When the read target address is not recorded in the data migration log area, the control unit reads data from the first storage unit.

A technique relates to flash-optimized data layout of a dataset for queries. Selection columns are stored in flash memory according to a selection optimized layout, where the selection optimized layout is configured to optimize predicate matching and data skipping. The selection optimized layout, for each selection column, is formed by storing a selection column dictionary filled with unique data values in a given selection column, where the unique data values are stored in sorted order in the selection column dictionary. Row position designations are stored corresponding to each row position that the unique data values are present within the given selection column, without duplicating storage of any of the unique data values that occur more than once in the given selection column.