Memory controllers, devices, modules, systems and associated methods are disclosed. In one embodiment, a memory system is disclosed. The memory system includes volatile memory configured as a cache. The cache stores first data at first storage locations. Backing storage media couples to the cache. The backing storage media stores second data in second storage locations corresponding to the first data. Logic uses a presence or status of first data in the first storage locations to cease maintenance operations to the stored second data in the second storage locations.

Modifications to caching performed between different services may be determined. A history of requests and responses between the different services may be obtained. The history may be evaluated to determine respective frequencies of parameters between the services. The frequencies of parameters may be evaluated to determine one or more modifications to caching among the different services. The modifications may be provided in order to be applied to change caching performance for subsequent requests.

Modifications to caching performed between different services may be determined. A history of requests and responses between the different services may be obtained. The history may be evaluated to determine respective frequencies of parameters between the services. The frequencies of parameters may be evaluated to determine one or more modifications to caching among the different services. The modifications may be provided in order to be applied to change caching performance for subsequent requests.

Techniques are provided for adaptive look-ahead configuration for data prefetching. One method comprises, in response to a request for a data item in a storage system: obtaining a size of a look-ahead window for the request based on one of multiple available caching policies; and moving the requested data item and additional data items within the look-ahead window to the cache memory when the requested data item and/or the additional data items within the look-ahead window are not in the cache memory. The multiple available caching policies comprise a caching policy based on characteristics of an input/output workload of the storage system, or a portion thereof; and/or a caching policy based on an input/output workload of at least a portion of the storage system within a prior predefined time window. The look-ahead window size may be varied over time.

Techniques are provided for adaptive look-ahead configuration for data prefetching. One method comprises, in response to a request for a data item in a storage system: obtaining a size of a look-ahead window for the request based on one of multiple available caching policies; and moving the requested data item and additional data items within the look-ahead window to the cache memory when the requested data item and/or the additional data items within the look-ahead window are not in the cache memory. The multiple available caching policies comprise a caching policy based on characteristics of an input/output workload of the storage system, or a portion thereof; and/or a caching policy based on an input/output workload of at least a portion of the storage system within a prior predefined time window. The look-ahead window size may be varied over time.

The present invention discloses a method and a system for managing cache memory. The system comprising a processor is configured to receive datasets from one or more applications, segregate the received datasets into one or more data blocks, identify a checkpoint from previously created checkpoints stored in a virtual cache corresponding to the one or more data blocks, wherein the checkpoints are previously created based on frequency of repetition of each of the one or more data blocks and association between the each of the one or more data blocks, recall a sequence of previously stored data blocks from main memory based on the identified checkpoint, and send the sequence of previously stored data blocks to the one or more applications for execution, thereby managing cache memory.

The present invention discloses a method and a system for managing cache memory. The system comprising a processor is configured to receive datasets from one or more applications, segregate the received datasets into one or more data blocks, identify a checkpoint from previously created checkpoints stored in a virtual cache corresponding to the one or more data blocks, wherein the checkpoints are previously created based on frequency of repetition of each of the one or more data blocks and association between the each of the one or more data blocks, recall a sequence of previously stored data blocks from main memory based on the identified checkpoint, and send the sequence of previously stored data blocks to the one or more applications for execution, thereby managing cache memory.

A multicore processing environment (MCPE) is disclosed. In embodiments, the MCPE includes multiple processing cores hosting multiple user applications configured for simultaneous execution. The cores and user applications share system resources including main memory and input/output (I/O) domains, each I/O domain including multiple I/O devices capable of requesting inbound access to main memory through an I/O memory management unit (IOMMU). For example, the IOMMU cache associates unique cache tags to each I/O device based on device identifiers or settings determined by the system registers, caching the configuration data for each I/O device under the appropriate cache tag. When each I/O device requests main memory access, the IOMMU cache refers to the appropriate configuration data under the corresponding unique cache tag. This prevents contention in the IOMMU cache caused by one device evicting the cache entry of another, minimizing interference channels by reducing the need for main memory access.

A multicore processing environment (MCPE) is disclosed. In embodiments, the MCPE includes multiple processing cores hosting multiple user applications configured for simultaneous execution. The cores and user applications share system resources including main memory and input/output (I/O) domains, each I/O domain including multiple I/O devices capable of requesting inbound access to main memory through an I/O memory management unit (IOMMU). For example, the IOMMU cache associates unique cache tags to each I/O device based on device identifiers or settings determined by the system registers, caching the configuration data for each I/O device under the appropriate cache tag. When each I/O device requests main memory access, the IOMMU cache refers to the appropriate configuration data under the corresponding unique cache tag. This prevents contention in the IOMMU cache caused by one device evicting the cache entry of another, minimizing interference channels by reducing the need for main memory access.

The disclosure relates to technology for up-evicting cache lines. An apparatus comprises a hierarchy of caches comprising a first cache having a first cache controller and a second cache having a second cache controller. The first cache controller is configured to store cache lines evicted from a first processor group to the first cache and to down-evict cache lines from the first cache to the second cache. The second cache controller is configured to store cache lines evicted from a second processor group into the second cache, to up-evict a first cache line from the second cache to the first cache in response to an eviction of a second cache line from the second processor group to the second cache, and to provide the up-evicted first cache line from the first cache to the second processor group in response to a request from the second processor group.