Patent classifications
G06F12/0882
WRITE-BEHIND OPTIMIZATION OF COVERING CACHE
Data base performance is improved using write-behind optimization of covering cache. Non-volatile memory data cache includes a full copy of stored data file(s). Data cache and storage writes, checkpoints, and recovery may be decoupled (e.g., with separate writes, checkpoints and recoveries). A covering data cache supports improved performance by supporting database operation during storage delays or outages and/or by supporting reduced I/O operations using aggregate writes of contiguous data pages (e.g., clean and dirty pages) to stored data file(s). Aggregate writes reduce data file fragmentation and reduce the cost of snapshots. Performing write-behind operations in a background process with optimistic concurrency control may support improved database performance, for example, by not interfering with write operations to data cache. Data cache may store (e.g., in metadata) data cache checkpoint information and storage checkpoint information. A stored data file may store storage checkpoint information (e.g., in a file header).
WRITE-BEHIND OPTIMIZATION OF COVERING CACHE
Data base performance is improved using write-behind optimization of covering cache. Non-volatile memory data cache includes a full copy of stored data file(s). Data cache and storage writes, checkpoints, and recovery may be decoupled (e.g., with separate writes, checkpoints and recoveries). A covering data cache supports improved performance by supporting database operation during storage delays or outages and/or by supporting reduced I/O operations using aggregate writes of contiguous data pages (e.g., clean and dirty pages) to stored data file(s). Aggregate writes reduce data file fragmentation and reduce the cost of snapshots. Performing write-behind operations in a background process with optimistic concurrency control may support improved database performance, for example, by not interfering with write operations to data cache. Data cache may store (e.g., in metadata) data cache checkpoint information and storage checkpoint information. A stored data file may store storage checkpoint information (e.g., in a file header).
Storage devices having minimum write sizes of data
The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a storage unit divided into a plurality of streams. The storage unit comprises a plurality of dies, where each die comprises two planes. One erase block from each plane of a die is selected for stream formation. Each erase block comprises a plurality of wordlines. A stream comprises one or two dies dedicated to storing parity data and a plurality of dies dedicated to storing user data. The stream further comprises space devoted for controller metadata. The storage device restricts a host device to send write commands in a minimum write size to increase programming efficiency. The minimum write size equals one wordline from one erase block from each plane of each die in the stream dedicated to storing user data minus the space dedicated to metadata.
Storage devices having minimum write sizes of data
The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a storage unit divided into a plurality of streams. The storage unit comprises a plurality of dies, where each die comprises two planes. One erase block from each plane of a die is selected for stream formation. Each erase block comprises a plurality of wordlines. A stream comprises one or two dies dedicated to storing parity data and a plurality of dies dedicated to storing user data. The stream further comprises space devoted for controller metadata. The storage device restricts a host device to send write commands in a minimum write size to increase programming efficiency. The minimum write size equals one wordline from one erase block from each plane of each die in the stream dedicated to storing user data minus the space dedicated to metadata.
SYSTEMS, METHODS, AND DEVICES FOR BIAS MODE MANAGEMENT IN MEMORY SYSTEMS
A method for managing a memory system may include monitoring one or more accesses of a page of memory, determining, based on the monitoring, an access pattern of the page of memory, and selecting, based on the access pattern, a coherency bias for the page of memory. The monitoring may include maintaining an indication of the one or more accesses. The determining may include comparing the indication to a threshold. Maintaining the indication may include changing the indication in a first manner based on an access of the page of memory by a first apparatus. Maintaining the indication may include changing the indication in a second manner based on an access of the page of memory by a second apparatus. The first manner may counteract the second manner.
SYSTEMS, METHODS, AND DEVICES FOR BIAS MODE MANAGEMENT IN MEMORY SYSTEMS
A method for managing a memory system may include monitoring one or more accesses of a page of memory, determining, based on the monitoring, an access pattern of the page of memory, and selecting, based on the access pattern, a coherency bias for the page of memory. The monitoring may include maintaining an indication of the one or more accesses. The determining may include comparing the indication to a threshold. Maintaining the indication may include changing the indication in a first manner based on an access of the page of memory by a first apparatus. Maintaining the indication may include changing the indication in a second manner based on an access of the page of memory by a second apparatus. The first manner may counteract the second manner.
METHOD FOR ACCESSING FLASH MEMORY AND FLASH MEMORY CONTROLLER AND ELECTRONIC DEVICE THEREOF
Disclosed is a method for accessing data from a flash memory. The method comprises a flash memory controller receiving an access command from a host device, according to the access command, the flash memory accessing a plurality of data from the data pages of a plurality of blocks in the flash memory simultaneously and simultaneously temporarily storing the accessed data to the plurality of buffers of the flash memory, and simultaneously temporarily storing the data in the plurality of buffers of the flash memory buffer to the plurality of buffers the flash memory controller.
METHOD FOR ACCESSING FLASH MEMORY AND FLASH MEMORY CONTROLLER AND ELECTRONIC DEVICE THEREOF
Disclosed is a method for accessing data from a flash memory. The method comprises a flash memory controller receiving an access command from a host device, according to the access command, the flash memory accessing a plurality of data from the data pages of a plurality of blocks in the flash memory simultaneously and simultaneously temporarily storing the accessed data to the plurality of buffers of the flash memory, and simultaneously temporarily storing the data in the plurality of buffers of the flash memory buffer to the plurality of buffers the flash memory controller.
STORAGE OF DATA STRUCTURES
A method, a system, and a computer program product for placement or storage of data structures in memory/storage locations. A type of a data structure for storing data and a type of data access to the data structure are determined. The type of data access includes a first and a second type of data access. A frequency of each type of access to each type of data structure accessed by a query is determined. Using the determined frequency, a number of first type of data accesses to the data structure is compared to a number of second type of accesses to the data structure. The numbers of first and second types of data access are compared to a predetermined threshold percentage of a total number of data accesses to the data structure. Based on the comparisons, a physical memory location for storing data is determined.
Memory management method and apparatus
A memory management method includes determining a memory page that needs to be swapped out of a memory, for each memory page that needs to be swapped out, generating, based on the memory page, a work task reclaiming the memory page, and allocating each work task to a dedicated worker thread for execution.