Provided herein are systems, methods and computer readable media for providing an out of band cache mechanism for ensuring availability of data. An example system may include a client device configured to, in response to determining requested data is not available in a cache, access the requested data from a data source, transmit, to a cache mechanism, an indication that the requested data is unavailable in the cache, the indication configured to be placed in a queue as an element pointing to the requested data, a cache mechanism configured to receive an indication of requested data, determine whether an element, the element indicative of the requested data, exists in a queue, and in an instance in which the element is not present in the queue, placing the element in the queue, the queue being a list of elements, each indicative of requested data needing to be placed in the cache.

Provided herein are systems, methods and computer readable media for providing an out of band cache mechanism for ensuring availability of data. An example system may include a client device configured to, in response to determining requested data is not available in a cache, access the requested data from a data source, transmit, to a cache mechanism, an indication that the requested data is unavailable in the cache, the indication configured to be placed in a queue as an element pointing to the requested data, a cache mechanism configured to receive an indication of requested data, determine whether an element, the element indicative of the requested data, exists in a queue, and in an instance in which the element is not present in the queue, placing the element in the queue, the queue being a list of elements, each indicative of requested data needing to be placed in the cache.

A method for hardware master/slave compression of a file, including resetting a counter; loading a first data portion of the file in a first buffer; loading a second data portion of the file in a second buffer; acquiring a first search string from the second buffer; performing a plurality of parallel searches for the acquired first search string in the first buffer; processing a plurality of results from the plurality of parallel searches; outputting a literal or a length-distance entity based on the plurality of results of the plurality of parallel searches for the acquired first search string; shifting the first buffer and the second buffer by a number of characters in a row; and acquiring a second search string from the second buffer of the file. In other aspects, a system for a hardware master/slave compression engine and a computing system for master/slave compression of a file are provided.

Embodiments of the invention provide a method, system and computer program product for dynamic caching module selection for optimized data deduplication. In an embodiment of the invention, a method for dynamic caching module selection for optimized data deduplication is provided. The method includes receiving a request to retrieve data and classifying the request. The method also includes identifying from amongst multiple different caching modules each with a different configuration a particular caching module associated with the classification of the request. Finally, the method includes deduplicating the data in the identified caching module.

A workload level associated with an expandable data buffer is determined, where the expandable data buffer and an expandable mapping table cache are stored in internal memory and the expandable mapping table cache is used to store a portion of a mapping table that is stored on external storage. An amount of internal memory allocated to the expandable data buffer and an amount of internal memory allocated to the expandable mapping table cache are adjusted based at least in part on the workload level.

A workload level associated with an expandable data buffer is determined, where the expandable data buffer and an expandable mapping table cache are stored in internal memory and the expandable mapping table cache is used to store a portion of a mapping table that is stored on external storage. An amount of internal memory allocated to the expandable data buffer and an amount of internal memory allocated to the expandable mapping table cache are adjusted based at least in part on the workload level.

In one embodiment a controller comprises logic to determine whether an electronic device is operating in a low power state and in response to a determination that the electronic device is operating in a low power state, implement a memory state management routine which reduces power to at least a section of volatile memory in the memory system. Other embodiments may be described.

In one embodiment a controller comprises logic to determine whether an electronic device is operating in a low power state and in response to a determination that the electronic device is operating in a low power state, implement a memory state management routine which reduces power to at least a section of volatile memory in the memory system. Other embodiments may be described.

A memory controller includes: a map cache area for storing a map cache lines including mapping information between a logical address and a physical address; a victim map cache line selector for selecting a victim map cache line among the map cache lines, using a victim map cache line selection model trained by using a storage state information as training data, when a physical address corresponding to a logical address of an operation request is absent in the map cache area; and a map data controller for removing the selected victim map cache line from the map cache area, providing the removed victim map cache line to a memory device, receiving a target map cache line including the physical address corresponding to the logical address of the operation request from the memory device, and storing the target map cache line in the map cache area.

Systems, methods, devices, and other techniques are disclosed for using an augmented neural network system to generate a sequence of outputs from a sequence of inputs. An augmented neural network system can include a controller neural network, a hierarchical external memory, and a memory access subsystem. The controller neural network receives a neural network input at each of a series of time steps processes the neural network input to generate a memory key for the time step. The external memory includes a set of memory nodes arranged as a binary tree. To provide an interface between the controller neural network and the external memory, the system includes a memory access subsystem that is configured to, for each of the series of time steps, perform one or more operations to generate a respective output for the time step. The capacity of the neural network system to account for long-range dependencies in input sequences may be extended. Also, memory access efficiency may be increased by structuring the external memory as a binary tree.