An electronic apparatus and a hot-swappable storage device thereof are provided. The hot-swappable storage device includes a carrier, a connector, a controller, and a wireless communication interface. The carrier is configured to carry a plurality of storage components. The connector is configured to be electronically connected to a host end for performing a data transfer operation. The controller detects a connection status between the connector and the host end. The wireless communication interface decides whether to perform the data transfer operation according to the connection status.

Designs for enabling safe insertion and removal of computing components from a live motherboard are presented herein. In one example, a method includes maintaining a slot power connection and an auxiliary power connection for a peripheral card slot in a powered-off state, and sensing insertion of a peripheral card into the peripheral card slot and responsively detecting whether the auxiliary power connection is employed by the peripheral card. Based on detecting the auxiliary power connection is employed by the peripheral card, the method further includes applying current limits selected for the peripheral card to the slot power connection and the auxiliary power connection and concurrently enabling the slot power connection and the auxiliary power connection for the peripheral card. Based on detecting the auxiliary power connection is not employed by the peripheral card, the method further includes applying a current limit selected for the peripheral card to the slot power connection and enabling only the slot power connection for the peripheral card.

According to one embodiment, a first power-supply voltage is applied to I/O cells, an I/O cell connected to a clock terminal is initially set to a threshold of a second voltage signaling, an I/O cell connected to a command terminal and I/O cells connected to data terminals are initially set as an input, and when a clock control unit detects receipt of one clock pulse and a signal voltage control unit detects a host using the second voltage signaling, a signal voltage control unit drives the I/O cell of a first data terminal. high level after a second power-supply voltage is applied to I/O cells and the threshold of a second voltage signaling is set to I/O cells of the clock, command and data terminals.

A passive cable adaptor for connecting a data source device with a display device is described. The adaptor has a packet-based interface connector at one end, the connector having a positive main link pin, a negative main link pin, a positive auxiliary channel pin, and a negative auxiliary channel pin. At the other end is a micro serial interface connector, wherein multimedia content is transmitted over the cable adaptor and electrical power is supplied over the cable adaptor simultaneously. The cable adaptor has an auxiliary and hot plug detect (HPD) controller utilized to map the auxiliary channel and HPD signals of the packet-based digital display to the micro serial interface ID signal.

Present disclosure relates to a method for managing a docking device and the docking device thereof. The docking device is configured with a processor and at least two coupling ports. The method comprises following steps: electrically coupling a computer and/or at least one peripheral device to the at least two coupling ports respectively; retrieving a plurality of characteristic profiles by the processor, wherein each of the characteristic profiles is retrieved from each of the at least two coupling ports; receiving, by the processor, an input signal from the computer or the at least one peripheral device; and changing the characteristic profiles based on the input signal by the processor.

Power delivery may be controlled to help prevent arcing when a data cable supplying power from a power source device to a power sink device is disconnected. The presence of a user in proximity to a connection between a cable plug and a cable receptacle may be detected. The level of a power signal being conveyed from the power source to the power sink may be reduced in response to the detection.

The present invention relates to a control system for use in a bus system having at least two transmission lines, having a first control device which has a first termination path and a first terminating resistor connected to the first termination path, a second control device which has a second termination path and a second terminating resistor connected to the second termination path, a first connector which is adapted to connect the first control device to the transmission lines and therefore to integrate the first control device in the bus system, a second connector which is adapted to connect the second control device to the transmission lines and therefore to integrate the second control device in the bus system, wherein the first connector and the second connector are different to one another. The invention also relates to a connector for connecting a control device to transmission lines of a bus system. Finally, the invention also relates to a method for configuring a bus system having at least two transmission lines.

In one example, a host device may identify a serial device connected to the host device to determine a host action. The host device may receive a serial device signal with a child serial device identifier from a serial device bridge. The host device may identify a child serial device based on the child serial device identifier. The host device may execute a host action based on the child serial device.

A sensor unit includes at least one sensor for detecting and converting measured quantities into sensor signals; at least one microprocessor; at least one memory for program modules for processing sensor signals, the program modules being executable on the microprocessor; and at least one communications interface to an external application processor, the program modules being able to be activated and deactivated via this communications interface, and further program modules are able to be loaded into the memory via this communications interface. The microprocessor includes at least one closed environment for executing plug-in program modules.

An apparatus for a microprocessor computer system and method for configuring the same where said microprocessor computer system comprises a processor core and at least one hardware buffer FIFO with memory-mapped head and tail that handles data movement among the processor cores, networks, raw data input and outputs, and memory. The method for configuring said microprocessor computer system comprises utilizing a FIFO auxiliary processor to process said data traversing said hardware FIFO; utilizing said hardware FIFOs to efficiently pipe data through functional blocks; and utilizing a FIFO controller to perform DMA operations that include non-unit-stride access patterns and transfers among processor cores, networks, raw data input and outputs, memory, and other memory-mapped hardware FIFOs.