Methods and apparatus relating to heterogeneous compute architecture hardware/software co-design for autonomous driving are described. In one embodiment, a heterogeneous compute architecture for autonomous driving systems (also interchangeably referred to herein as Heterogeneous Compute Architecture or HCA for short) integrates scalable heterogeneous processors, flexible networking, benchmarking tools, etc. to enable (e.g., system-level) designers to perform hardware and software co-design. With HCA system engineers can rapidly architect, benchmark, and/or evolve vehicle system architectures for autonomous driving. Other embodiments are also disclosed and claimed.

Embodiments of the present invention provide a method, system and computer program product for the dynamic association of components in a multi-tier application to different layers of a corresponding multi-tier application infrastructure. In an embodiment of the invention, a method for dynamically associating components in a multi-tier application to different layers of a corresponding multi-tier application infrastructure includes defining in memory of a host computing system a pattern that has an inventory of components of a multi-tier application. The method also includes associating each of the components with a corresponding tier label for an n-tier architecture. The method yet further includes loading the pattern into a pattern engine. Finally, the method includes deploying by the pattern engine each component of the pattern to a layer of the n-tier architecture corresponding to a tier label associated with the component.

Various embodiments are generally directed to techniques for collective operations among compute nodes in a distributed processing set, such as by utilizing ring sets and local sets of the distributed processing set. In some embodiments, a ring set may include a subset of the distributed processing set in which each compute node is connected to a network with a separate router. In various embodiments, a local set may include a subset of the distributed processing set in which each compute node is connected to a network with a common router. In one or more embodiments, each compute node in a distributed processing set may belong to one ring set and one local set.

Embodiments of the present invention provide a method, system and computer program product for the dynamic association of components in a multi-tier application to different layers of a corresponding multi-tier application infrastructure. In an embodiment of the invention, a method for dynamically associating components in a multi-tier application to different layers of a corresponding multi-tier application infrastructure includes defining in memory of a host computing system a pattern that has an inventory of components of a multi-tier application. The method also includes associating each of the components with a corresponding tier label for an n-tier architecture. The method yet further includes loading the pattern into a pattern engine. Finally, the method includes deploying by the pattern engine each component of the pattern to a layer of the n-tier architecture corresponding to a tier label associated with the component.

Programmable devices, hierarchical parallel machines and methods for providing state information are described. In one such programmable device, programmable elements are provided. The programmable elements are configured to implement one or more finite state machines. The programmable elements are configured to receive an N-digit input and provide a M-digit output as a function of the N-digit input. The M-digit output includes state information from less than all of the programmable elements. Other programmable devices, hierarchical parallel machines and methods are also disclosed.

A method and system of efficient use and programming of a multi-processing core device. The system includes a programming construct that is based on stream-domain code. A programmable core based computing device is disclosed. The computing device includes a plurality of processing cores coupled to each other. A memory stores stream-domain code including a stream defining a stream destination module and a stream source module. The stream source module places data values in the stream and the stream conveys data values from the stream source module to the stream destination module. A runtime system detects when the data values are available to the stream destination module and schedules the stream destination module for execution on one of the plurality of processing cores.

Apparatuses, systems, and techniques to route data transfers between hardware devices. In at least one embodiment, a path over which to transfer data from a first hardware component of a computer system to a second hardware component of a computer system is determined based, at least in part, on one or more characteristics of different paths usable to transfer the data.

Devices, systems and methods are provided for writing, by a plurality of computing resources, to contiguous memory addresses of memory that supports random access, without having to specify actual write addresses of the memory.

Embodiments of the present invention provide a method, system and computer program product for the dynamic association of components in a multi-tier application to different layers of a corresponding multi-tier application infrastructure. In an embodiment of the invention, a method for dynamically associating components in a multi-tier application to different layers of a corresponding multi-tier application infrastructure includes defining in memory of a host computing system a pattern that has an inventory of components of a multi-tier application. The method also includes associating each of the components with a corresponding tier label for an n-tier architecture. The method yet further includes loading the pattern into a pattern engine. Finally, the method includes deploying by the pattern engine each component of the pattern to a layer of the n-tier architecture corresponding to a tier label associated with the component.

A computing system framework and method for configuration thereof are provided. A plurality of processing modules is accessed. Each processing module includes a plurality of processing nodes and each processing node is associated with an intramodule port and an intermodule port. The processing modules are connected in a ring via intermodule connections between at least a portion of the intermodule ports of the processing modules. A network switch is arranged in a center of the ring of processing modules and connections are formed between the network switch and at least one of the processing modules by connecting every Sth processing module to the network switch, connecting every Sth and Sth-1 processing modules to the network switch, or by connecting every Sth and Sth-r processing modules to the network switch. S is a number of steps between the processing modules.