An apparatus, and a method therefore, are described, the apparatus according to one embodiment including a security manager and a plurality of clusters of processing elements. Each cluster of the plurality of clusters includes a respective plurality of processing elements. A controller of the apparatus, which may include a security manager, may be configured to control the plurality of clusters to receive a first data stream and a second data stream, control a first plurality of processing elements in a first cluster to process the first data stream using a first security protocol, and control a second plurality of processing elements in a second cluster to process the second data stream using a second security protocol.

A power-availability-based power delivery configuration system includes a power scaling system that is coupled to a device and a power system. The power scaling system includes an adjustable power scaling circuit that is configured to convert power received from the power system from a first power level to a second power level. A power scaling controller is coupled to the device, the power system, and the power scaling circuit. The power scaling controller identifies a power amount available from the power system and, based on the power amount available from the power system, determines power delivery settings for the adjustable power scaling circuit and configures the adjustable power scaling circuit using the power delivery settings. The power scaling controller may also determine device settings for the device based on the power amount available from the power system and configure the device using the device settings.

Representative apparatus, method, and system embodiments are disclosed for configurable computing. A representative system includes an interconnection network; a processor; and a plurality of configurable circuit clusters. Each configurable circuit cluster includes a plurality of configurable circuits arranged in an array; a synchronous network coupled to each configurable circuit of the array; and an asynchronous packet network coupled to each configurable circuit of the array. A representative configurable circuit includes a configurable computation circuit and a configuration memory having a first, instruction memory storing a plurality of data path configuration instructions to configure a data path of the configurable computation circuit; and a second, instruction and instruction index memory storing a plurality of spoke instructions and data path configuration instruction indices for selection of a master synchronous input, a current data path configuration instruction, and a next data path configuration instruction for a next configurable computation circuit.

In one embodiment, a processor includes: at least one configuration register to store configuration information for a hardware resource including a control circuit to configure the hardware resource based at least in part on the configuration information; a performance monitor to maintain performance information during execution of an application on the processor; and a controller coupled to the at least one configuration register. The controller may dynamically provide the configuration information to the at least one configuration register based at least in part on the performance information, and the control circuit is to adjust a performance tuning of the hardware resource according to the configuration information. Other embodiments are described and claimed.

A reconfigurable data processor includes a plurality of configurable units, and a configuration controller. The configuration controller is configured to start execution of a first application graph in a first set of configurable units. Then, concurrently with the execution of the first application graph in the first set of configurable units, the configuration controllers receive a command to load a configuration file into a second set of configurable units and obtain the configuration file. The configuration file contains information to configure the second set of configurable units to execute a second application graph. The configuration file is then loaded into the second set of configurable units and execution of the second application graph is started in the second set of configurable units.

An apparatus, and a method therefore, are described, the apparatus according to one embodiment including a security manager and a plurality of clusters of processing elements. Each cluster of the plurality of clusters includes a respective plurality of processing elements. A controller of the apparatus, which may include a security manager, may be configured to control the plurality of clusters to receive a first data stream and a second data stream, control a first plurality of processing elements in a first cluster to process the first data stream using a first security protocol, and control a second plurality of processing elements in a second cluster to process the second data stream using a second security protocol.

A method, a computer program product, and a system for server provisioning and deployment. The method includes receiving a deployment configuration for a server. The deployment configuration includes a requested software build and a requested installation of an application and configuration for the server. The method also includes reconfiguring hardware on the server based on the deployment configuration and via an out-of-band management card on the server and pushing a boot loader on to the server for installation of an operating system. The method further includes performing an installation of the operating system on the server, transmitting an auto configuration file to the server. The auto configuration file provides installation properties relating to the application. The method also includes monitoring a status of the server during the installation of the application using a serial terminal output on the server.

A glass circuit assembly employing densely packed components is described. Air cooled computer systems employing densely packed circuit components are described. Relating to agile reconfigurable computer systems a high-resolution substrate having an area of at least 100 cm.sup.2 and selected traces having a line/space dimension of 2 micrometers or less is employed to integrate multiple independently operable clusters of flip chip mounted components in a circuit assembly. Switchable chips and redundant switchable chips may be included on each circuit assembly. Each independently operable cluster of components may include a power distribution chip, a test/monitor chip, and at least one redundant chip for each different logic device and for each different memory device. Chiplet components and combinations may be used to populate independently operable clusters of components. Agile reconfigurable systems are operable to adapt to changing workloads under direction of a system controller.

A reconfigurable data processor comprises an array of configurable units and a bus system. The bus system is connected to the array of configurable units. The bus system includes a top level network and an array level network. The top level network is connected to an external data interface for communication with memory outside of the array of configurable units. The array level network is connected to configurable units in the array of configurable units.

In an approach to optimizing dynamic system reconfiguration, a computer receives an active system configuration and a target system configuration from a system administrator, where the target system configuration includes two or more logical partitions. A computer determines one or more reconfiguration actions required to transform the active system configuration to the target system configuration. A computer generates a dependency graph based on the determined reconfiguration actions. A computer divides the dependency graph along the two or more logical partitions. A computer sorts the determined reconfiguration actions by associated dependencies. A computer orders the determined reconfiguration actions based on a priority of each of the two or more logical partitions. A computer runs a first simulation of the determined reconfiguration actions for each of the two or more logical partitions. A computer performs the determined reconfiguration actions for each of the two or more logical partitions.