A display device includes: first and second substrates with a liquid crystal therebetween; pixel electrodes and a common electrode provided to the first or second substrate; a light source including first to third light sources; and an image processor generating a signal to be provided to each pixel based on an input image signal. A frame period includes a first subframe period in which the first light source is on, a second subframe period in which the second light source is on, a third subframe period in which the third light source is on, and a fourth subframe period in which one or more of the first to third light sources are on. The image processor divides a gradation value into two values smaller than the gradation value, allocates one of the two values to the fourth subframe period, and allocates the other value to the other first subframe period.

A pixel circuit and a method of driving the same, and a display device. The pixel circuit includes a plurality of pixel compensation circuits, and each pixel compensation circuit can be connected to M light-emitting units located in the same column. Each light-emitting control signal terminal of the M light-emitting control signal terminals included in each light-emitting control signal terminal group may be connected to a pixel compensation circuit group (i.e., K rows of pixels compensation circuits).

The present disclosure relates to a driving method for a display device and a display device. The display device includes a display driver, the display driver includes a plurality of driving channels each of which drives corresponding display unit according to display data in a pulse width modulation manner within one frame period, the method comprises: selectively enabling, in each sub-frame subset among a plurality of different sub-frame subsets of the frame period, different channel subset among a plurality of channel subsets of the plurality of driving channels to drive corresponding display unit, wherein each channel subset of the plurality of channel subsets includes two or more driving channels among the plurality of driving channels.

A display apparatus includes an addition section, a conversion section, and a control section. The addition section adds a dither signal to a digital image signal for each of a plurality of color components, the digital image signal being generated on a basis of each of the plurality of color components different from each other, and inputted in predetermined order for each sub-frame included in a frame. The conversion section performs digital to analog conversion of converting the digital image signal to which the dither signal is added into an analog image signal. The control section controls a pattern of the dither signal, at each predetermined cycle including a plurality of the sub-frames, depending on the order in which the digital image signal for each of the color components is inputted, within the frame.

A display panel and its drive method, and a display device are provided in the present disclosure. The method for driving the display panel includes refreshing a first-color picture N times in one frame. A time interval between every two adjacent refreshings of the N times of the refreshing is T1 for the first-color picture, T1=T2/N, T2 is a duration of the one frame, N>1, and N is a positive integer. The first-color picture may be refreshed multiple times in the one frame, and the multiple refreshing processes of the first-color picture may be evenly distributed, which may reduce each picture retention duration after the first-color picture is refreshed. Furthermore, before the human eyes are not able to recognize the brightness decrease of a previous first-color picture, a next first-color picture is refreshed, thereby effectively improving the picture flickering phenomenon of the display panel.

A circuit device includes a scan line drive circuit that drives a plurality of scan lines of an electro-optical element. A field for constituting one image includes a plurality of subfields. The scan line drive circuit selects once a scan line group to be selected among the plurality of scan lines, in a subfield included in the plurality of subfields. The scan line group includes a scan line connected to a pixel circuit to which an i-th bit is written in a subfield, and a scan line connected to a pixel circuit to which a j-th bit is written in a subfield.

A display apparatus according to embodiments of the present disclosure includes a display panel including at least one light emitting element that emits light according to a difference in respective voltages applied to an anode electrode and a cathode electrode, and including a plurality of pixels that are connected to a plurality of data lines, a plurality of gate lines, and a plurality of light emitting control lines, wherein a reset voltage is supplied to the anode electrode, a data driver for supplying data signals to the data lines, a gate driver for supplying gate signals to the gate lines, and supplying a light emitting control signal to each of the light emitting control lines, and a timing controller for controlling the data driver and the gate driver, and enabling the reset voltage to be supplied in sync with a plurality of non-light emitting periods of the light emitting control signal included in one frame.

A display system includes a data processing unit and a liquid crystal panel. The data processing unit partitions display data pixels in one frame into, for example, blocks of four pixels in two rows×two columns, performs predetermined processing on display data of four display data pixels, and transmits processing data with an amount of data of 1□4 pixels to the liquid crystal panel in four subframes. Panel pixels of the liquid crystal panel are partitioned into blocks of four pixels in two rows×two columns, data signals based on processing data are provided to four panel pixels included in one block in a subframe f1 among the four subframes, and of the four subframes, in subframes f2 to f4, data signals based on the processing data are provided in a predetermined order to three of the panel pixels included in the one block.

A control method or the like is provided capable of suppressing a flicker phenomenon even if frame periods vary in length. The control method is for controlling an emission period and an extinction period of a frame period, which is a period in which one image continues to be displayed. When a signal indicating start of a frame period is detected, as the frame period, n subframe periods that configure the frame period, where n is an integer greater than or equal to 2, are sequentially started from the first subframe period, after a predetermined period of time has elapsed since the detection of the signal. All of the n subframe periods are controlled to have a substantially same length determined in advance and to have a substantially same ratio between the emission period and the extinction period, determined in advance, the ratio being referred to as a duty ratio.

A driving method adapted to drive a first pixel of a display device to display an image in a frame time is provided. The driving method includes dividing the frame time into a first sub-frame time and a second sub-frame time; providing a first data with a first gray level; and controlling the first pixel to be emitted in the first sub-frame time or in the second sub-frame time according to the first data. When the first gray level is greater than a predetermined gray level, controlling the first pixel to be emitted in the first sub-frame time, and when the first gray level is less than or equal to the predetermined current level, controlling the first pixel to be emitted in the second sub-frame time.