A display device in which parasitic capacitance between wirings can be reduced is provided. Furthermore, a display device in which display quality is improved is provided. Furthermore, a display device in which power consumption can be reduced is provided. The display device includes a signal line, a scan line, a first electrode, a second electrode, a third electrode, a first pixel electrode, a second pixel electrode, and a semiconductor film. The signal line intersects with the scan line, the first electrode is electrically connected to the signal line, the first electrode has a region overlapping with the scan line, the second electrode faces the first electrode, the third electrode faces the first electrode, the first pixel electrode is electrically connected to the second electrode, the second pixel electrode is electrically connected to the third electrode, the semiconductor film is in contact with the first electrode, the second electrode, and the third electrode, and the semiconductor film is provided between the scan line and the first electrode to the third electrode.

A novel semiconductor device or a highly reliable semiconductor device is provided. The on/off state of a transistor which functions as a switch for writing data is controlled using the potential of a potential hold portion. The potential of the potential hold portion is controlled using a plurality of capacitors, whereby both a positive potential and a negative potential can be held in the potential hold portion. Accordingly, deterioration of the transistor which functions as the switch for writing data can be prevented and the characteristics of the transistor can be maintained. Therefore, the highly reliable semiconductor device can be provided.

A display device with a narrow bezel is provided. The display device includes a pixel circuit and a driver circuit provided on one plane. The driver circuit includes a selection circuit and a buffer circuit. The buffer circuit includes a first transistor and a second transistor. Sources of the first and second transistors are electrically connected with each other. Drains of the first and second transistors are electrically connected with each other. Gates of the first and second transistors are electrically connected with each other. The first transistor and the second transistor are stacked so that the direction of the current flow in the first transistor is parallel to that in the second transistor.

A thin-film transistor (TFT) array substrate is provided. The TFT array substrate is structured to change the way that sub-pixels are arranged so that during a displaying period of a frame of image, the sub-pixels that have inconsistent brightness/darkness become alternate with each other spatially so that a displaying defect of vertical bright/dark lines can be improved and the overall resistance of the data line can be reduced to thereby reduce resistance-capacitance delay and prevent incorrect charging at a tail end of a scan line or a data line.

A display device includes a display area configured to include a plurality of pixels and a plurality of data lines connected to the pixels. A hole area is disposed within the display area. A hole crack detection line is disposed adjacent to the hole area and surrounds the hole area. The device includes first and second detection lines which include first and second detection transfer lines and first and second detection receiving lines, respectively. A test controller electrically connects the first detection receiving line to a first data line and the second detection receiving line to a second data line. Pixels connected to the first data line that is connected to a first bright-line transistor and pixels connected to the second data line that is connected to a second bright-line transistor are configured to emit light when a crack occurs in the hole crack detection line.

A transistor whose channel region includes an oxide semiconductor is used as a pull down transistor. The band gap of the oxide semiconductor is 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. Thus, hot carrier degradation in the transistor can be suppressed. Accordingly, the circuit size of the semiconductor device including the pull down transistor can be made small. Further, a gate of a pull up transistor is made to be in a floating state by switching of onion of the transistor whose channel region includes an oxide semiconductor. Note that when the oxide semiconductor is highly purified, the off-state current of the transistor can be 1 aA/μm (1×10.sup.−18 A/μm) or less. Therefore, the drive capability of the semiconductor device can be improved.

A display device includes: pixel electrodes including a first pixel electrode and a second pixel electrode adjacent to the first pixel electrode in a first direction; switching elements including a first switching element coupled to the first pixel electrode and a second switching element coupled to the second pixel electrode; gate lines including a first gate line coupled to the first switching element and a second gate line coupled to the second switching element; a gate driver supplying a gate signal to the gate lines; and drive electrodes including a first drive electrode and a second drive electrode adjacent to the first drive electrode in the first direction. The first drive electrode overlaps the first and second pixel electrodes, and the second gate line. The second drive electrode overlaps the first gate line. The gate driver supplies the gate signal to the first and second gate lines simultaneously.

A display device including a pixel electrode disposed in an opening area; a common electrode of which at least a region is disposed to be overlapped with the pixel electrode; a gate line extending along a first direction in a non-opening area surrounding the opening area and transmitting a gate signal to the pixel electrode; a data line extending along a second direction different from the first direction in the non-opening area, and transmitting a data signal to the pixel electrode; and a dummy line disposed to be overlapped with the data line in the non-opening area and electrically connected to the common electrode.

A display device includes a display panel including pixels, an active area on which an image is configured to be displayed, and a black matrix area on which an image is not configured to be displayed, touch sensor electrodes configured to detect a touch of an external object, the touch sensor electrodes disposed in the active area, and detection input electrodes configured to generate mutual capacitance with the touch sensor electrodes, the detection input electrodes disposed in an edge area of the display panel that overlaps the black matrix area.

A display panel and a display apparatus are disclosed. The display panel comprises: a plurality of signal lines extending in a first direction; at least one first reference voltage bus which extends in a second direction intersecting the first direction; and a plurality of electrostatic discharge units divided into a plurality of electrostatic discharge unit groups, wherein the plurality of electrostatic discharge unit groups are arranged in the second direction and each of the plurality of electrostatic discharge unit groups comprises at least two electrostatic discharge units arranged in the first direction, wherein at least one of the plurality of signal lines is electrically connected to the first reference voltage bus through at least one of the plurality of electrostatic discharge units.