G09G3/3648

Transceiver system for reducing noise influence between adjacent channels
11568828 · 2023-01-31 · ·

A transceiver system includes a transmitter including a first driving signal output unit and a second driving signal output unit and a receiver including a first sensing signal input unit and a second sensing signal input unit. A first channel includes a first input/output line and a second input/output line that connect the first driving signal output unit and the first sensing signal input unit, and are configured to transfer signals having different phases; a second channel including a third input/output line and a fourth input/output line that connect the second driving signal output unit and the second sensing signal input unit, and are configured to transfer signals having different phases; and a first compensation capacitor including a first electrode electrically connected to the second input/output line and a second electrode electrically connected to the third input/output line.

Method of generating OSD data

The present invention provides a method for generating a plurality of on-screen display (OSD) data used in a back-end (BE) circuit. The BE circuit is configured to process a plurality of image data to be displayed on a display device. The method includes steps of: receiving the plurality of image data from an application processor (AP); and extracting information of a detecting layer embedded in the plurality of image data, wherein the information of the detecting layer indicates the plurality of OSD data corresponding to at least one user-interface (UI) layer in the plurality of image data.

3D liquid crystal display panel, display device and driving method
11561427 · 2023-01-24 · ·

A 3D liquid crystal display panel includes: a first substrate, a second substrate, and a first grating layer including grating openings arranged in an array for realizing 3D display; and a CF layer including a plurality of filter units arranged in an array, a black matrix disposed between adjacent filter units, and at least one light shielding strip disposed inside each of the filter units and dividing each of the filter units into a plurality of light transmitting regions. The 3D liquid crystal display panel is configured to apply voltages to the electrode layer to form a liquid crystal grating in the liquid crystal layer, and a collimated light incident to the liquid crystal layer passes through the liquid crystal grating and pass through the filter unit to form a monochromatic light, and then, is emitted out from the grating openings.

LIQUID CRYSTAL DISPLAY DEVICE AND DRIVING METHOD THEREFOR
20230229249 · 2023-07-20 ·

A plurality of gate bus lines are scanned one by one such that a video signal is written, via a corresponding source bus line, into each of pixel forming sections provided in a plurality of rows and a plurality of columns. When a sensor electrode is driven to detect a touch position, the scanning of the gate bus lines is stopped. Operation of a gate driver and operation of a touch sensor drive circuit are controlled such that, when the sensor electrode is driven, a stop row that is a row at which the scanning of the gate bus lines is stopped is different in each of a first frame period and a second frame period that are two consecutive frame periods.

Display apparatus and method of driving the same
11562705 · 2023-01-24 · ·

A display apparatus includes: a sensor substrate including a first area and a second area; a plurality of sensors at the first area and not at the second area; a display panel on the sensor substrate, the display panel including a first display area corresponding to the first area, and a second display area corresponding to the second area, the first display area including a pixel area and a non-pixel area; at least one subpixel at the pixel area and no subpixels at the non-pixel area; and a display panel driver to control a driving signal of the first display area and a driving signal of the second display area according to a ratio between the pixel area of the first display area and the non-pixel area of the first display area.

Display apparatus including a plurality of display panels, and method of controlling thereof

A display apparatus is disclosed. The display apparatus includes a backlight configured to emit light; a first polarizing plate, disposed in front of the backlight, configured to polarize light emitted from the backlight in a first direction; and a plurality of display panels sequentially disposed in front of the first polarizing plate, wherein each of the plurality of display panels is configured to include a liquid crystal panel and a color filter disposed in front of the liquid crystal panel, and wherein a display panel disposed at a farthest distance from the first polarizing plate from among the plurality of display panels is configured to include a second polarizing plate that polarizes the light of the first direction in a second direction.

Display device
11703725 · 2023-07-18 · ·

According to one embodiment, a display device includes a driver, a pixel circuit disposed to be apart from the driver in a plan view and to be electrically connected to the driver, a first pixel electrode disposed to overlap the pixel circuit in a plan view and to be electrically connected to the pixel circuit, a second pixel electrode disposed to overlap the driver in a plan view and to be closer to an outer edge of a display area than the first pixel electrode, and a relay line disposed between the pixel circuit and the first pixel electrode and between the driver and the second pixel electrode, the relay line electrically connecting the first pixel electrode and the second pixel electrode.

Display panel and display device having gate drive circuit

Provided are a display panel and a display device. The display panel includes multiple cascaded gate drive units. Each gate drive unit includes a shift register unit and an inverted unit. The inverted unit is electrically connected to the shift register unit. A scan output terminal of the shift register unit is electrically connected to one scan line. An inverted scan output terminal of the inverted unit is electrically connected to one inverted scan line. The scan output terminal of the shift register unit outputs a first effective pulse signal. The inverted scan output terminal of the inverted unit outputs a second effective pulse signal. A time period corresponding to the first effective pulse signal at least partially overlaps a time period corresponding to the second effective pulse signal, and the type of the first effective pulse signal is opposite to the type of the second effective pulse signal.

SEMICONDUCTOR DEVICE
20230019400 · 2023-01-19 ·

One of the objects is to improve display quality by reduction in malfunctions of a circuit. In a driver circuit formed using a plurality of pulse output circuits having first to third transistors and first to fourth signal lines, a first clock signal is supplied to the first signal line; a preceding stage signal is supplied to the second signal line; a second clock signal is supplied to the third signal line; an output signal is output from the fourth signal line. Duty ratios of the first clock signal and the second clock signal are different from each other. A period during which the second clock signal is changed from an L-level signal to an H-level signal after the first clock signal is changed from an H-level signal to an L-level signal is longer than a period during which the preceding stage signal is changed from an L-level signal to an H-level signal.

PIXEL DRIVING CIRCUIT, DISPLAY PANEL, AND ELECTRONIC DEVICE
20230016926 · 2023-01-19 ·

A pixel driving circuit, a display panel, and an electronic device. The pixel driving circuit includes: a pixel array including a plurality of pixel circuits, an RGBG pixel arrangement mode being adopted in the pixel array; at least four gate lines, arranged in a first direction of the pixel array, one row of pixel circuits being arranged between every two adjacent gate lines, and each row of pixel circuits corresponding to one gate line; at least eight data lines, arranged in a second direction perpendicular to the first direction and intersecting each gate line, each data line being connected to pixel circuits corresponding to sub-pixels of the same color in one column of pixel circuits; and a demultiplexer circuit, connected to the data lines, and configured to control the data lines to be in communication with an integrated circuit chip.