Display device is provided and includes scanning line; semiconductor layer; pixel electrode; first insulating film having first contact hole; organic insulating film having second contact hole; and second insulating film having third contact hole, wherein semiconductor layer has first linear portion that is orthogonal to scanning line, pixel electrode is electrically connected to first linear portion via first, second and third contact holes, first linear portion overlaps first, second and third contact holes that are aligned along first linear portion, and center of second contact hole is located between center of first contact hole and center of third contact hole.

A method of driving a display panel and a display apparatus having a plurality of gate lines and a plurality of data lines that cross the gate lines. The method includes determining whether to compensate a gate signal or not according to input image data displayed on a display panel, transmitting a first gate signal having a first falling waveform to a first gate line and a second gate signal having a second falling waveform different from the first falling waveform to the second gate line. A first gate clock signal may be adjusted when the gate signal is determined to be compensated. A timing controller may compensate the first gate signal when an artifact would be displayed based on a variation in brightness when a first subpixel row to which the first gate signal is applied is brighter than a second subpixel row for a same target luminance.

A shift register unit, a circuit structure, a gate drive circuit, a drive circuit and a display device are provided. A shift register unit includes a substrate and an input circuit, a reset circuit, a first output circuit, a first output terminal, a first connection conductive portion connecting both the input circuit and the reset circuit, a second connection conductive portion connecting both the reset circuit and the first output circuit, and a third connection conductive portion connecting both the first output circuit and the first output terminal, all of which are on the substrate.

This application provides a drive circuitry for a display panel and a display device. The drive circuitry includes a drive circuit board, a power chip, a driving chip, a detection circuit, and a control circuit. The detection circuit detects a logic voltage at a logic signal receiving terminal and outputs a control signal. The power terminal of the driving chip is coupled to the power chip through the control circuit. The control circuit controls to turn on or turn off the coupling between the power chip and the driving chip according to the control signal.

A plurality of video data pieces corresponding to one horizontal scan line of a display panel are classified into a first video data group and a second video data group different from the first video data group. Each piece of video data belonging to the first video data group is converted into a gradation voltage having an analog voltage value, and by interpolation based on each of the gradation voltages, a gradation voltage corresponding to each of the video data pieces belonging to said second video data group is obtained.

The present disclosure discloses a shift register unit and a driving method thereof, a shift register circuit and a display device, and relates to the field of display technology, in order to solve problems of the conventional shift register that it has a complex structure, and occupies a too larger space. The shift register unit comprises an input module for receiving a signal of an input signal terminal and a signal of a high level terminal, a reset module for resetting an output terminal of the shift register unit and a pull-up control node, a pull-down module for discharging the pull-up control node and the output terminal of the shift register unit, a pull-down control module for generating a power supply enable signal and a power supply signal, and an output control module for generating a gate drive signal and outputting the power supply enable signal, the power supply signal and the gate drive signal. The shift register unit provided by the present disclosure is applied to the display device.

According to one embodiment, a display device includes a plurality of display elements arranged in a matrix, a plurality of scanning lines, a plurality of signal lines, and a controller configured to control display by sequentially supplying an image signal and a control signal to the plurality of signal lines and the plurality of scanning lines, respectively, wherein the controller repeats a display period in which the display is controlled and a display blanking period in which the display is paused to display a frame image, and at least two types of display periods with different lengths are used when a frame image is displayed.

A display apparatus includes, a first pattern included in a first layer, a second pattern included in a second layer, a first test pattern including a plurality of first lines extending in a first direction and having a first width, and being spaced apart from each other, a second test pattern included in the second layer, including a central line and a plurality of second lines connected to the central line, wherein the plurality of second lines extend in the first direction have a second width, and are spaced apart from each other, and wherein at least one of the second lines is electrically connected to the first lines, and a shift tester configured to apply a test voltage to the central line to determine a degree by which the second pattern is shifted with respect to the first pattern by measuring the voltages at the first lines.

A shift register, a method for driving the shift register and a display apparatus are provided. The shift register includes a noise reduction control circuit and a pull-up node noise reduction circuit. The noise reduction control circuit is connected with a first clock signal terminal that receives a first clock signal, a gate drive signal output terminal that outputs a gate drive signal, a noise reduction control terminal, and a noise reduction control node. The pull-up node noise reduction circuit is connected with the noise reduction control circuit, the noise reduction control terminal, and a pull-up node.

The present disclosure provides a gate driving circuit and a display apparatus, wherein the gate driving circuit comprises a shift register (10) including a plurality of shift register units connected with each other sequentially, and the gate driving circuit further comprises: a first strobe module (20) and/or a second strobe module (30); the first strobe module (20), connected to a gate scanning trigger signal line (STV) and strobe signal lines (CS0, CS1); the second strobe module (30), connected to the strobe signal lines. With incorporation of the first strobe module (20), a gate scanning trigger signal on a gate scanning trigger signal line (STV) is supplied to a predetermined shift register unit according to strobe signals provided on the strobe signal lines (CS0, CS1); and the second strobe module (30), which is configured to cut off communication between the predetermined shift register unit and its previous stage of shift register unit according to the strobe signals provided on the strobe signal lines (CS0, CS1), so that the shift register is turned off from the predetermined shift register unit, and thus it can be achieved on a liquid crystal display panel that the gate signal(s) in a black-scan area are selectively turned off in a partial display mode, thus power consumption of the whole display panel being reduced.