An object of the present invention is to provide a driver IC and a liquid crystal display apparatus which uses a circuit of an output channel which is not used to drive a liquid crystal panel as a backup of the other output channel. A driver IC includes a plurality of output channels ch1 to chn, a plurality of output buffer circuits corresponding to each of the plurality of output channels ch1 to chn, and an output channel selection circuit, and when a malfunction occurs in the output buffer circuit of an effective channel, the output buffer circuit in which the malfunction occurs is automatically switched to the output buffer circuit of an ineffective channel so that the output of the signal from the effective channel is continued.

The present disclosure relates to a technique for determining a fault of a data line disposed in a display panel using a data driving device. The data driving device may determine a fault of a data line by supplying a data voltage corresponding to a greyscale value to a data line and checking whether another data line is influenced by the data voltage.

This invention provides an electro-optical module with reduced noise in driving voltage. The invention can include a power supply substrate that is arranged separately from the flexible substrate having a driver, so that the noise of the driving voltage supplied from the power supply substrate is reduced. The electro-optical module includes a first connecting portion connecting a first end of the flexible substrate to a display panel and configured to receive a signal from the driver, and a second connecting portion connecting the first end of the flexible substrate to the display panel and configured to receive the driving voltage from a third connecting portion at a second end of the flexible substrate.

A display device includes a liquid crystal display panel, two electrodes in the liquid crystal display panel, a switching element having a source and a drain one of which is coupled to one of the two electrodes, a scan line coupled to a gate of the switching element, a signal line coupled to the other of the drain and the source, an inversion driver, and a scan circuit configured to provide, to the scan line, any of a first potential, a second potential, and a third potential lower than the second potential. The scan circuit switches a potential of the scan line from the second potential to the third potential at a timing at which the potential of the other of the two electrodes is made lower than that of the one of the two electrodes in a period in which the source and the drain are electrically disconnected.

An image display apparatus is disclosed. The image display apparatus includes a display and a power supply configured to supply driving voltage to the display, wherein the power supply includes a converter to convert input AC voltage into DC voltage and a controller to control the converter, the converter includes a first leg including a first switching device and a second switching device connected to each other in series and a second leg including a first diode and a second diode connected to each other in series, the first diode and the second diode connected to the first leg in parallel, and the controller controls on time of the first switching device to gradually increase from a first level to a second level for a first period for which the input AC voltage rises after a zero crossing point.

A display driving apparatus includes an internal reference voltage generation circuit configured to generate and provide an internal reference voltage; a sensing circuit configured to simultaneously sense pixel signals provided from pixels of a display panel and the internal reference voltage, and output a reference voltage sensing signal generated by sensing of the internal reference voltage and pixel sensing signals generated by sensing of the pixel signals; and an output circuit configured to sequentially select the reference voltage sensing signal and the pixel sensing signals, convert the pixel sensing signals into pixel data, convert the reference voltage sensing signal into reference data, and transmits the pixel data and the reference data.

The power consumption of a display device is reduced. The power consumption of a driver circuit in a display device is reduced. A pixel included in the display device includes a display element. The pixel is configured to have a function of retaining a first voltage corresponding to a first input pulse signal and a function of driving the display element with a third voltage obtained by addition of a second voltage corresponding to a second input pulse signal to the first voltage.

The power consumption of a display device is reduced. The power consumption of a driver circuit in a display device is reduced. A pixel included in the display device includes a display element. The pixel is configured to have a function of retaining a first voltage corresponding to a first input pulse signal and a function of driving the display element with a third voltage obtained by addition of a second voltage corresponding to a second input pulse signal to the first voltage.

A display device may include a timing controller, a level shifter, a gate driver, and a display panel. The timing controller may generate a first on-clock signal, a first off-clock signal, and a first output control signal. The level shifter may generate a first-type gate clock signal. A rising edge of the first-type gate clock signal and a falling edge of the first-type gate clock signal may be respectively synchronized with a rising edge of the first on-clock signal and a falling edge of the first off-clock signal. The gate driver may output first-type gate signals based on the first-type gate clock signal. The display panel may include pixels. The pixels may emit lights in response to the first-type gate signals. The level shifter may partially block a pulse of the first-type gate clock signal based on the first output control signal to generate sub-pulses.

A source driver includes a data latch unit that outputs acquired pixel data, a gradation voltage conversion unit that acquires the pixel data outputted from the data latch unit and converts the pixel data to gradation voltages, an output unit that amplifies and outputs the gradation voltages to source lines, and a timing control unit that controls the timing of the output of the pixel data from the data latch unit. The timing control unit performs control such that the longer a source line is from a source driver to a pixel column, the smaller the timing difference is between acquisition of the pixel data by the data latch unit and the output of the pixel data.