A display device includes a pixel, a scan driver supplying first to third scan signals in a first non-emission period and supplying the second scan signal in a second non-emission period, an emission driver supplying an emission control signal in the first and second non-emission periods, and a data driver supplying a data signal in the first non-emission period. The pixel includes a light-emitting element, a first transistor, a second transistor connected between the data line and a second node, a first capacitor connected between the first and second nodes, a third transistor connected between a third power line and the first node, a storage capacitor connected between the first and third nodes, a fourth transistor connected between the third node and a fourth power line, a fifth transistor connected between the first power line and the first transistor, and a sixth transistor supplying a fifth supply voltage.

A display device includes a pixel having a first transistor connected between first and second nodes to generate a driving current; an emission driver that supplies an emission control signal including an off-duty corresponding to first and second gate-off periods to an emission control line during a frame period; a scan driver that supplies first to fourth scan signals to the first to fourth scan lines in a first non-emission period, respectively, and that supplies the first scan signal to the first scan line in a second non-emission period; a data driver that supplies a data signal to the data line; and a controller adjusting the off-duty of the emission control signal that is a width of each of the first and second non-emission periods in response to a dimming signal, and that controls a timing at which the first scan signal is supplied in the second non-emission period.

A pixel driving circuit, a method of driving the same, and a display panel are provided. The pixel driving circuit includes a scanning line, a data line, an organic light emitting diode, a first control switch, a second control switch, and a storage electric capacity. The scanning line drives a control end of the second control switch. An input end of the second control switch is connected to the data line. An output end of the second control switch drives a control end of the first control switch. A first power source signal drives an input end of the first control switch. The organic light emitting diode is coupled between an output end of the first control switch and a second power source signal. The storage electric capacity is coupled between a first reference signal and the control end of the first control switch.

A display apparatus includes a display panel, a scan driver, a data driver and a timing controller. The display panel includes a plurality of pixels that are connected to a plurality of data lines and a plurality of scan lines having different lengths. The scan driver apply a plurality of scan signals to the plurality of scan lines. The data driver apply a plurality of data voltages to the plurality of data lines, and receive a plurality of sensing data that represent operating characteristics of all of the plurality of pixels from a plurality of sensing lines. The timing controller controls operations of the scan driver and the data driver, generates output image data considering the operating characteristics of all of the plurality of pixels and supply the output image data to the data drive.

The present application relates to a voltage compensating circuit and a display. The voltage compensating circuit includes: an electroluminescence device; a driving unit, used for driving the electroluminescence device; a luminescence time length control unit, respectively connected with the driving unit and the electroluminescence device, and used for controlling luminescence time length of the electroluminescence device; and a compensation unit, respectively connected with the driving unit and the luminescence time length control unit, and used for providing a compensation voltage to the voltage compensating circuit. Through the voltage compensating circuit in the present application, a dropped voltage value is compensated, thereby brightness uniformity of the display is improved, and image quality is improved.

A display apparatus includes a plurality of pixels. A pixel includes a first capacitor connected between a first voltage line receiving a first driving signal and a first node, a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal and a second electrode connected to a second node, an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal, a second capacitor connected between an m-th data line and the second node (wherein, ‘m’ is a natural number) and a second transistor comprising a control electrode connected to an n-th scan line (wherein, ‘n’ is a natural number), a first electrode connected to the first node and a second electrode connected to the second node.

A display substrate has a display area and a peripheral area. The display substrate includes a plurality of sub-pixels, a plurality of groups of gate scan signal lines, and a plurality of groups of data lines. Each group of gate scan signal lines includes at least one gate scan signal line, each group of data lines includes n data lines, and the plurality of sub-pixels are arranged in an array; and n is greater than or equal to 2. A group of gate scan signal lines is electrically connected to n rows of sub-pixels. A column of sub-pixels is electrically connected to a group of data lines, and includes a plurality of groups of sub-pixels. Each group of sub-pixels includes n sub-pixels. The n sub-pixels are respectively electrically connected to n data lines in the group of data lines to which this column of sub-pixels is electrically connected.

A display may include an array of pixels. Each pixel in the array may include a drive transistor, emission transistors, a data loading transistor, a gate voltage setting transistor, an initialization transistor, an anode reset transistor, a storage capacitor, and an optional current boosting capacitor coupled in series with an isolation transistor. A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations. During a data refresh, the isolation transistor can be turned on to provide current boosting. During emission periods, the isolation transistor is turned off to prevent cathode noise from potentially coupling through to one or more direct-current voltage nodes in the pixel.

A one-bit memory circuit for amoled panel sub-pixels is provided with an auxiliary latch circuit and a control switch on the basis of an existing one-bit memory circuit. The control switch is configured for controlling the activation of the auxiliary latch circuit. When the control switch is turned on, the auxiliary latch circuit, together with a voltage-controlled current MOS transistor and a light emitting diode in the existing one-bit memory, forms a latch for latching the voltage on a capacitor in the existing memory circuit. The one-bit memory circuit of the present invention reasonably utilizes components in the existing circuit and cuts down additional components required for achieving the latch function.

A display device of the present inventive concept includes a processor supplying grayscale data in active periods of frame periods and stopping supply of the grayscale data in blank periods of the frame periods; a switch controller generating a first switch control signal when a blank period is longer than a predetermined period, and generating a second switch control signal when the blank period ends; a power supply supplying a voltage different from a first power voltage to a first power line when the first switch control signal is received and supplying the first power voltage to the first power line when the second switch control signal is received; and pixels commonly connected to the first power line.