Systems and methods are disclosed, comprising a memory device comprising multiple groups of memory cells, the groups comprising a first group of memory cells and a second group of memory cells configured to store information at a same bit capacity per memory cell, and a processing device operably coupled to the memory device, the processing device configured to adjust a scan event threshold for one of the first or second groups of memory cells to a threshold less than a target scan event threshold for the first and second groups of memory cells to distribute scan events in time on the memory device.

A memory device to perform a read disturb scan of unprogrammed memory cells. In one approach, a test read is performed on unprogrammed memory cells in a first memory block of a storage media (e.g., NAND flash) to provide a test result. Based on the test result, a portion of the unprogrammed cells for which a threshold voltage is above a predetermined voltage is determined. A determination is made whether the portion of the unprogrammed memory cells exceeds a predetermined limit. In response to determining that the portion exceeds the predetermined limit, data is moved from the first memory block to a second memory block of the storage media.

A change in a read window of a group of memory cells of a memory device that has undergone a plurality of program/erase cycles (PECs) can be determined. read voltage can be determined based at least in part on the determined change in the read window.

A radiation detection system may include a mobile device having a flash memory. The device may monitor various characteristics of the flash memory to determine when damage to the flash memory has occurred from radiation exposure. The device may associate damage to the flash memory with a radiation dose, and determine a level of radiation to which the memory, and thus the device, has been exposed. The device also may determine a length of time and locations where the radiation exposure has occurred. If the device determines that the level of radiation exposure exceeds a threshold associated with a safe level of radiation exposure for a human user, the device may generate an alert to the user.

A memory system includes a nonvolatile memory configured to execute one of a plurality of read operations, including a first read operation and a second read operation, and a memory controller configured to issue a read command to the nonvolatile memory to cause the nonvolatile memory to execute one of the plurality of read operations. The memory controller is configured to receive a read request, estimate a reliability level of a result of a read operation to be executed by the nonvolatile memory to read data from a physical address specified in the read request, select one of the first and second read operations to be executed first in a read sequence corresponding to the read request by the nonvolatile memory based on the estimated reliability level, and instruct the nonvolatile memory to execute the selected read operation.

An apparatus includes a plurality of NAND strings in a block with word lines connected to cells of the NAND strings and select lines connected to select gate transistors of the NAND strings. A plurality of blocks are connected together and selected for operations using a block select signal. A control circuit is configured to, after a read operation of memory cells of the block, hold a block select signal applied to a block select line to select a group of blocks having a same block select line at an on level. The control circuit can further discharge an unselected control gate in the group of blocks from a charged level to a lower level, lower than charged, prior to turning off the block select signal and charge the unselected control gate to a level greater than the lower level after the block select signal transitions from the on level to an off level.

A memory device may include memory cells configured to establish multiple levels of charge distributions; and a memory controller configured to perform operations on the memory cells. The operations may include recording a bit count number for a highest level of charge distributions within a set of memory cells, recording a bit count number for a lowest level of charge distributions within the set of memory cells, counting bits for the highest level of charge distributions within the set of memory cells, counting bits in the lowest level of charge distributions within the set of memory cells, comparing the counted bits for the highest level to the recorded bit count number for the highest level, and comparing the counted bits for the lowest level to the recorded bit count number for the lowest level.

In some examples, a fluid dispensing device component includes an input to receive a control signal from the fluid dispensing system, the control signal for activating fluidic actuators during a fluidic operation mode. The fluid dispensing device component further includes a nonvolatile memory, and a controller to, during a memory write mode, write a first portion of the nonvolatile memory to a first programmed level responsive to application of a first programming voltage and activation of the control signal, and write a second portion of the nonvolatile memory to a second programmed level responsive to application of a second programming voltage different from the first programming voltage and activation of the control signal.

A computer-implemented method, according to one embodiment, includes: performing a first read of one or more pages in a first page region of a first block. In response to determining that the highest RBER experienced during the first read is not in a first predetermined range, a first calibration procedure is performed on the one or more pages. A second read of the one or more pages is performed. In response to determining that the highest RBER experienced during the second read is not in a second predetermined range, a second calibration procedure on the one or more pages is performed, and a third read of the one or more pages is performed. In response to determining that the highest RBER experienced during the third read is not in the second predetermined range, a reliability counter which corresponds to the first page region of the first block is incremented.

A nonvolatile memory device includes a nonvolatile memory cell including a first cell transistor and a second cell transistor electrically coupled to a bit line in parallel and configured to respectively have a first physical size and a second physical size, a cell transistor selector coupled between the nonvolatile memory cell and a ground voltage terminal to control electrical connections between the first cell transistor and the ground voltage terminal, and between the second cell transistor and the ground voltage terminal, and a read voltage selection circuit suitable for selectively supplying one of a first read voltage and a second read voltage to the bit line.