A probe card includes a sub-board, having a heating layer, connected to a probe pin. A main board is connected to the sub-board and includes a first output terminal configured to output first power received from a first power supply to the heating layer in a first mode. A power converter is configured to lower a first voltage corresponding to residual power received from the first power supply to a second voltage and output the residual power in a second mode. A second output terminal is configured to receive the residual power from the power converter and second power from a second power supply and output third power including the residual power and the second power to a device under test in the second mode. A first switch unit is connected to the first power supply, the first output terminal, and the power converter.

A semiconductor device test apparatus for improving a loss rate of a test signal in testing a device under test is provided. The semiconductor device test apparatus includes a probe interface board, a pogo block disposed on the probe interface board and electrically connected to a device under test, an equipment board disposed under the probe interface board, an alternating current (AC) controller, transferring and receiving an AC signal for performing an AC test on at least one of the device under test and the pogo block, being mounted on the equipment board, and a physical layer equalizing (PLE) board disposed between the probe interface board and the equipment board, a first equalizing circuit, decreasing loss of the AC signal, being mounted on the PLE board.

An injection device is utilized to inject a liquid onto a test area of a semiconductor element. The injection device includes a height-adjusting base, a reservoir, a first testing pipe, a cleaning pipe, a liquid-draining pipe, and an electrode rod. The reservoir is provided with a dropping port. The dropping port is against the test area of the semiconductor element. The first testing pipe, the cleaning pipe and the liquid-draining pipe are connected to the reservoir. The electrode rod penetrates through the reservoir and contacts and ionizes a testing liquid. A semiconductor testing system utilizing the injection device and its testing method are also provided herein.

A probe card device and a transmission structure are provided. The transmission structure includes a supporting layer, a plurality of metal conductors spaced apart from each other and slantingly inserted into the supporting layer, and an insulating resilient layer formed on the supporting layer. Each of the metal conductors includes a positioning segment held in the supporting layer, a connecting segment and an embedded segment respectively extending from two ends of the positioning segment, and an exposed segment extending from the embedded segment. Each of the embedded segments is embedded and fixed in the insulating resilient layer, and each of the exposed segments protrudes from the insulating resilient layer. When any one of the exposed segments is pressed by an external force, the insulating resilient layer is configured to absorb the external force through the corresponding embedded segment so as to have a deformation providing a stroke distance.

The present disclosure provides a probe and a probe card device. The probe card device includes a first plate and a plurality of probes. The probes are arranged through the first plate, and include a first probe and a second probe. The first probe has a first body and an end portion of the first body. The end portion of the first body has a first recess and a first protrusion. The second probe has a second body and an end portion of the second body. The end portion of the second body has a second recess and a second protrusion. The second protrusion extends into the first recess.

Disclosed herein are apparatuses and methods for mitigating sticking of units-under-test (UUTs). For example, in some embodiments, a probe card may include a probe landing pad, a guide plate having a hole therein, and a pushing mechanism. The pushing mechanism may include a pusher needle and a pusher needle support, the pusher needle support may be between the probe landing pad and the guide plate, and the pusher needle support may be controllable to cause the pusher needle to extend and retract through the hole in the guide plate.

A wafer test system includes a probe apparatus, a data server, an automation subsystem, and a probe mark assessment subsystem. The probe apparatus includes a probe card, a tester, and a camera. The probe card includes probe pins for contacting test pads in the wafer, and the camera captures an image of the test pads. The automation subsystem obtains an image specification from the probe apparatus and triggers an automated assessment of a probe mark in the image of the test pads. The probe mark assessment subsystem performs the automated assessment of the probe mark in the image of the test pads. The probe mark assessment subsystem performs an image-processing operation to obtain a probe mark assessment result, and the automation subsystem stops the probe apparatus if the probe mark assessment result indicates a probe test failure.

An inspection apparatus includes a load port area in which a carrier accommodation chamber for accommodating a carrier that receives an inspection object is disposed; an inspection area in which a plurality of probe cards are respectively disposed under a plurality of inspection devices, and in which the probe card is pressed against an electronic device of the inspection object on a chuck top to inspect the electronic device; a transfer area in which a transfer mechanism transfers the inspection object onto the chuck top; and a plurality of probe card accommodation devices disposed in at least one of the load port area or the inspection area, each probe card accommodation device being capable of accommodating the probe card, and a number of the probe card accommodation devices being equal to or greater than a number of the probe cards.

A probe chip consisting of multiple probes integrated on a single substrate. The layout of the probes could be designed to match specific features on the device under test. The probes are spring-loaded to allow for reversible deformation during contacting of the device under test. The probe chip provides for detailed electrical and mechanical testing of integrated circuits (IC).

A probe installation circuit board includes an insulating layer provided on upper and lower surfaces thereof with a trace structure including two grounding traces and a signal trace located therebetween, and a grounding layer. Each grounding trace is connected with the grounding layer by at least one conductive via including a through hole penetrating through the grounding trace and the insulating layer, and a conductive layer disposed therein to electrically connect the grounding trace and layer. The signal trace and the conductive layers are made of a metal material. The grounding layer and traces are made of another metal material. A probe device includes the circuit board and three probes disposed on the traces respectively. The present invention is capable of thin copper traces and lowered trace surface roughness, easy in control of trace distance, width and thickness, and beneficial to achieve the fine pitch requirement.