Certain aspects of the present disclosure are directed towards a method for circuit testing. The method generally includes: determining a probability distribution indicating prior failure probabilities associated with a circuit design; determining a first likelihood associated with occurrence of at least one failure for the circuit design; determining a quantity of test instances to be performed using simulation to detect the at least one failure based on the probability distribution and the first likelihood; and outputting the quantity of test instances.

A method of operating an electrical test prediction apparatus includes determining a relationship between first electrical test (ET) data, corresponding to at least one shot region comprising a subset of a plurality of semiconductor chips of a wafer, and electrical die sorting (EDS) data, obtained by measuring a state of each chip on the wafer by a testing device, and predicting second ET data, corresponding to an region of the wafer other than the at least one shot region by performing machine learning on the relationship.

A computer-implemented method is provided. Aspects include receiving first waveform data of a first format, wherein the first waveform data includes event-based simulation data. Aspects include generating second waveform data of a second format based on the first waveform data, wherein the second waveform data is compatible with a cycle-based simulation environment. Aspects include performing one or more debugging operations by processing the second waveform data within the cycle-based simulation environment.

Systems, methods, and other embodiments described herein relate to improving the testing of electronic devices using adaptable interfaces. In one embodiment, a method includes receiving a set of virtual electronic control units, receiving a set of interface devices connected to test devices, simulating wire harnesses where each wire harness contains a subset of virtual electronic control units and a subset of interface devices, both of which are configured to communicate therein based on a multicast protocol, and injecting a fault in a target wire harness affecting a test device connected to the subset of interface devices associated with the target wire harness in accordance with a multicast group assignment.