Patent classifications
G01R31/31912
POWER SUPPLY STRESS TESTING
A test instrument performs a power supply stress test by invoking current surges in a device under test. The current surges are invoked by stimulating functional blocks in the device under test with test signals received via a network interface of the device under test.
Virtual directory navigation and debugging across multiple test configurations in the same session
An integrated circuit test method provides an interactive shell environment having analysis modules organized as a directory such that for a given session a user can access any of the analysis modules. This invention describes a virtual directory structure for navigating through the entire test data starting from design, test configuration, ATPG patterns, failure information and callout information. This structure also allows the creation of a scripting environment for the user to select a specific configuration and process the information. User can achieve all of this in a single session as opposed to working on every test configuration in an independent session.
MEASUREMENT APPARATUS WITH PROJECTED USER INTERFACE
A measurement apparatus (1) comprising at least one shielded electronic measurement circuit (2) configured to measure and process electrical signals and a user interface (6) used by a user to interact with the electronic measurement circuits (2) of said measurement apparatus (1), wherein the user interface (6) comprises at least one adaptable graphical user interface (6A) projected by a projection unit (7) of said measurement apparatus on one or several projection areas.
METHOD, CENTRAL TEST CONTROL UNIT, MEASUREMENT SYSTEM
The present disclosure provides a method for operating a measurement system that comprises at least one measurement application device and at least one device under test, the method comprising centrally configuring the measurement system for a test measurement, centrally verifying the correct setup of the measurement system, and performing the test measurement with the measurement system. In addition, the present disclosure provides a respective central test control unit and a respective measurement system.
Multi-user test instrument
A test and measurement instrument includes one or more processors to execute code to cause the processors to: access a user instance of the test and measurement instrument; receive one or more requests from the user instance of the test and measurement instrument; determine any collisions between the one or more requests and any other requests for elements of the test and measurement instrument; resolve any collisions as necessary; perform one or more operations to fulfill the request; and display information resulting from the one or more operations on an instance user interface.
Wire order testing method and associated apparatus
A wire order testing method for testing pin connection relationships between a memory device and an electronic device is provided. The method includes the steps of: testing the memory device with at least one test pattern to obtain at least one first data; predicting at least one second data that is to be obtained from the testing of the memory device with the test pattern according to the mapping relationships between the test pattern and the pins of the memory device; determining the pin connection relationships between the memory device and the electronic device according to the first data and second data.
DETERMINISTIC CONCURRENT TEST PROGRAM EXECUTOR FOR AN AUTOMATED TEST EQUIPMENT
The invention concerns a test program executor for an Automated Test Equipment, wherein the test program executor is configured to execute a test flow having a plurality of test suites, wherein the test program executor is configured to asynchronously execute the plurality of test suites, wherein a test suite contains a call of a function of a subsystem, wherein the function of the subsystem is related with a subsystem operation that is to be executed by the subsystem, and to signal a call of a function of a subsystem by transmitting an asynchronous request to the subsystem, the asynchronous request having a call-specific call tree hierarchy address and the call-specific operation to be executed by the subsystem, and wherein the test program executor is further configured to determine an execution order of the subsystem operations, such that the execution order of the subsystem operations depends on their call-specific call tree hierarchy addresses.
METHOD OF CREATING PROGRAM FOR MEASUREMENT SYSTEM, MEASUREMENT SYSTEM THEREFOR, AND COMPUTER READABLE RECORDING MEDIUM THEREFOR
Provided are a measurement system that has a plurality of measurement modules and is capable of creating a program of each measurement module easily and a method of creating a program therefor. A measurement system 100 includes a first and second measurement modules 120 and 130, and a controller 102 controlling thereof, in which the controller includes a first processor, a first memory and a first timer; the first measurement module includes a second processor, a second memory, and a second timer; and the second measurement module includes a third processor, a third memory, a third timer; the controller further includes a first function column including one or more execution steps of a first function sequence to be executed by the first measurement module, and a second function column including one or more execution steps of a second function sequence to be executed by the second measurement module, the second function column being adjacent in a first adjacent direction of the first function column.
SYSTEM AND METHOD FOR FORMAL CIRCUIT VERIFICATION
A system and computer-implemented method for calculation and display of a fault propagation path. The method identifies with a computing device a fault location in an electrical circuit under test, identifies with the computing device an observation point in the electrical circuit under test, computes with the computing device a fault path from the fault location to the observation point, and displays in a waveform viewer all signals in the fault path from the fault location to the observation point in order of their creation.
Method and Device for Analyzing an Electrical Circuit
A method of analyzing an electrical circuit applied for an electrical system is disclosed. The method includes steps of obtaining a loss parameter and an eye diagram of a circuit channel of the electrical system; comparing the eye diagram with a standard eye diagram to generate a comparison result; generating an analytic result of the loss parameter according to the comparison result in order to adjust the eye diagram; and adjusting the loss parameter according to the analytic result.