An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

The present invention provides an output voltage compensation method, for a DC voltage source having a constant voltage circuit and a constant current circuit connected in series, and the DC voltage source provides an output voltage to a device under test (DUT), and the output voltage compensation method comprising: generating a voltage compensation value according to a load current and a gain parameter of the DUT; generating a virtual current setting value according to a voltage setting value and the voltage compensation value; generating a duty cycle command according to the virtual current setting value and a load current measurement value of the load current; and generating the output voltage conforming to the voltage setting value according to the duty cycle command. Wherein the gain parameter is related to a multiplier parameter of the constant voltage circuit.

A test and measurement instrument including a voltage source configured to output a source voltage, a current sensor, and one or more processors. The one or more processors are configured to determine an estimation of a load of an unknown connected device under test based on the source voltage, the current sensor, and a voltage of the connected device under test without any prior knowledge of the connected device under test.

A scan chain architecture with lowered power consumption comprises a multiplexer selecting between a functional input and a test input. The output of the multiplexer is coupled to a low threshold voltage latch and, in test mode, to a standard threshold voltage latch. The low threshold voltage latch and standard threshold voltage latch are configured to store data when a clock input falls, using a master latch functional clock M_F_CLK, master latch test clock M_T_CLK, slave latch functional clock S_F_CLK, and slave latch test clock S_T_CLK. The slave latch has lower power consumption than the master latch.

A signal generator and a method for controlling the signal generator, capable of suppressing variation in the intensity of signals inputted to multiple devices under test are provided. An attenuation amount setting unit 15 sets a reference attenuation amount, obtained by subtracting the maximum amount of the losses stored in the cable loss storage unit 16 with respect to the cables 4a to 4f connected to the output ports 12a to 12f from a target attenuation amount, to the first attenuator 11, and sets an output attenuation amount, obtained by subtracting the losses stored in the cable loss storage unit 16 with respect to each of the cables 4a to 4f connected to the output ports 12a to 12f, from the maximum amount of the losses, to each of the second attenuators 14a to 14f.

An example method of stabilizing a voltage at a device under test (DUT) includes identifying one or more characteristics of a deviation in a first voltage to appear at the DUT. The deviation may result from a digital signal and a concomitant transient current in the DUT. The digital signal may be part of a test flow to be sent over one or more test channels of automatic test equipment (ATE) to the DUT. The one or more characteristics may be identified prior to sending the test flow to the DUT. The method also includes generating a second voltage to apply to the DUT. The second voltage may be based on the one or more characteristics and being shaped to reduce the deviation.

An apparatus for testing a device under test (DUT) is provided. The apparatus includes a power supply device and a data generating device. The power supply device is configured to provide a first voltage and a second voltage to the DUT. The data generating device is configured to provide first data to the DUT. The power supply device is configured to provide the first voltage to the DUT in a first time duration. The data generating device is configured to provide the first data to the DUT in the first time duration. The power supply device is configured to provide the second voltage to the DUT in a second time duration after the first time duration. The second voltage is different from the first voltage.

A ring oscillator circuit design includes three or more inverter stages connected in series. Each inverter stage includes one or more inverter devices including a PMOS device and a coupled NMOS device. The PMOS device in each of odd alternating inverter devices of the three or more inverter stages having a source terminal receiving power from a power rail conductor, and a source terminal of the coupled NMOS device in each of first alternating inverter devices is grounded. An output of a last inverter device of a last stage of the three or more inverter stages is connected to an input of a first inverter stage. The method measures a first frequency of a first ring oscillator circuit and measures a second frequency of a second ring oscillator circuit design to determine either a BTI or HCI failure mechanism of the first ring oscillator circuit based on the measurements.

The present disclosure relates to a detection system including a control circuit, a power line network bridge circuit, a fixture device and a detection device. The control circuit is configured to generate a plurality of detection signals. The power line network bridge circuit receives detection signals through a power line. The fixture device is electrically connected to the power line through the power line network bridge, and is configured to receive the detection signals. The fixture device is configured to transmit the detection signals to a device under test, so that the device under test displays a plurality of media. The detection device is configured to capture the media and transmit the media to the control circuit. The control circuit is further configured to determine whether the media match with detection parameters.

An electronic device includes a bias generator to generate a plurality of bias currents and a testing module to test the bias generator by successively testing each subset of bias currents of a plurality of subsets of bias currents grouped from the plurality of bias currents as a corresponding single test current. The testing module can include a variable resistor, wherein the testing module is to test the bias generator by, for each subset of bias currents, configuring the variable resistor to have a corresponding resistance based on the number of bias currents represented in the subset, conducting a corresponding test current through the variable resistor configured to the corresponding resistance, the test current representing a combination of all bias currents of the corresponding subset, and determining a test status for the subset of bias currents based on a voltage across the variable resistor resulting from the corresponding test current.