A circuit chip is connected to a sensor chip in a sub-unit via a communication terminal, and includes an output wave formation circuit that performs communication by controlling a voltage of a power supply supplied from an electronic control unit (ECU) to raise a voltage level of an output signal. When the voltage of the power supply monitored by a voltage monitor rises above a threshold value, a control circuit lowers a voltage of a signal from the output wave formation circuit, thereby preventing an excessive rise of the power supply voltage used in a signal communication.

A circuit for implementing a scan chain in programmable resources of an integrated circuit is described. The circuit comprises a programmable element configured to receive an input signal and generate an output signal based upon the input signal; a selection circuit configured to receive the output signal generated by the programmable element at a first input and to receive a scan chain input signal at a second input, wherein the selection circuit generates a selected output signal in response to a selection circuit control signal; and a register configured to receive the selected output signal of the selection circuit.

Systems, methods, and computer readable medium described herein relate to techniques for characterizing and/or anomaly detection in integrated circuits such as, but not limited to, field programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs). In one example aspect of certain example embodiments, a fully digital technique relies on the pulse width of signals propagated through a path under test. In another example aspect, the re-configurability of the integrated circuit is leveraged to combine the pulse propagation technique with a delay characterization technique to yield better detection of certain type of Trojans and the like. Another example aspect provides for running the test through reconfigurable path segments in order to isolate and identify anomalous circuit elements. Yet another example aspect provides for performing the characterization and anomaly detection without requiring golden references and the like.

A fault analysis method comprises: receiving fault data from wafer level testing that identifies locations and test results of a plurality of die; applying a kernel transform to the fault data to produce cluster data, where the kernel transform defines a fault impact distribution that defines fault contribution from the failed die to local die within an outer radial boundary of the fault impact distribution. Applying the kernel transform comprises: centering the fault impact distribution at a location of each die that failed wafer level testing, associating each local die that falls within the outer radial boundary with a respective fault contribution value according to the fault impact distribution, and accruing fault contribution values associated with each respective die of the plurality of die to produce a cluster value for the respective die, which correlates to a probability of failure of the respective die at a future time.

A method of testing a data transmission and reception system comprises sending a test signal from a transmitter (14) of the system to a receiver (12) of the system, and analyzing the received signal. A duty cycle relationship is varied between the test signal and the timing signal used by the receiver of the system, and the effect of the duty cycle variation is analyzed. Varying the duty cycle relationship provides duty cycle distortion (DCD), and this can be considered as a form of embedded jitter insertion. This type of jitter can be measured relatively easily.

A delay measurement circuit includes a transporting path selector, first and second delay measurement devices, and a controller. The delay measurement circuit forms a plurality of transporting loops through two of a first reference transporting conductive wire, a second reference transporting conductive wire, and a tested transporting conductive wire according to a control signal. The first delay measurement device respectively measures part of the transporting loops to obtain a plurality first transporting delays. The second delay measurement device respectively measures part of the transporting loops to obtain a plurality second transporting delays. The controller generates the control signal, and obtains a transporting delay of the tested transporting conductive wire according to the first transporting delays and the second transporting delays.

A test device for testing an electronic device has a base, a first mounting plane, a first support element, a plurality of second support elements, a plurality of test elements, and a control unit. The first mounting plane is mounted on the base. The first support element is slidable on the first mounting plane, the second support elements are slidable on the first support element, and the test elements are slidable on the second support elements. The control unit electrically coupled to the test elements controls the test elements to provide impact force on the electronic device.

A setup time and hold time detection system including a monitoring unit and a processing unit. The monitoring unit is configured to detect multiple setup times and multiple hold times of multiple test circuits through a source clock signal. The processing unit is configured to record multiple setup times and multiple hold times as multiple detection data. The processing unit is further configured to select a first part of the detection data as multiple first detection data to establish an estimation model. The processing unit is further configured to select a second part of the detection data as multiple second detection data, and compare the second detection data and multiple estimation results generated by the estimation model to obtain an error value of the estimation model.

One embodiment is a system including a data collector located in a cable network for capturing multi-tone signals traversing the cable network; a data repository located in a cloud network and having an interface for communicating with the data collector and for storing the multi-tone signals captured by the data collector and network data associated with the cable network; and a central server including a memory element storing Predictive Services Management (PSM) algorithms comprising instructions and associated data and a processor operable to execute the PSM algorithms. The central server is configured for detecting a fault in the cable network and identifying a segment associated with the fault; determining a maximum tap magnitude for the fault; calculating an aggregate tap magnitude for the fault; and classifying a severity of the fault based at least in part on the maximum tap magnitude and the aggregate tap magnitude.

There is described a test block intended to be implanted in the circuit connecting an apparatus to be tested such as an electricity meter or a protective relay and a power source supplying the apparatus to be tested such as an intensity sensor and/or a voltage sensor, the test block comprising a base including a plurality of inner electric circuits capable of allowing the transmission of information from the power source to the apparatus to be tested and a protective cover intended to be removably assembled with the base in order to form a closed enclosure in which the inner electric circuits are housed. The base and the protective cover are configured such that the removal of the protective cover gives access to a receiving site delimited by the base and capable of receiving, by plugging, a test plug independent of the test block and electrically linked to a test equipment, in particular a voltmeter and/or an ammeter and/or a dummy current source. The base and the protective cover comprise electrically conductive elements linked to each other and configured so as to ensure a continuity and magnetic shielding closure such that the enclosure delimited by the base and the protective cover is a Faraday cage protecting the inner electric circuits relative to the magnetic fields external to the enclosure delimited by the base and the protective cover.