A technique for fabricating bumps on a substrate is disclosed. A substrate that includes a set of pads formed on a surface thereof is prepared. A bump base is formed on each pad of the substrate. Each bump base has a tip extending outwardly from the corresponding pad. A resist layer is patterned on the substrate to have a set of holes through the resist layer. Each hole is aligned with the corresponding pad and having space configured to surround the tip of the bump base formed on the corresponding pad. The set of the holes in the resist layer is filled with conductive material to form a set of bumps on the substrate. The resist layer is stripped from the substrate with leaving the set of the bumps.

For optical communications between semiconductor ICs, optical transceiver assembly subsystems may be integrated with a processor. The optical transceiver assembly subsystems may be monolithically integrated with processor ICs or they may be provided in separate optical transceiver ICs coupled to or attached to the processor ICs.

A hybrid multi-layered optical flexible printed circuit device, comprising: an optical flexible substrate including a first open window and a second open window with a first, a second surfaces opposite to each other; an intrinsic film including a first bonding region aligned with the first open window and a second bonding region aligned with the second open window formed on the first surface; an optical waveguide film including a first notch with a first slant surface aligned with the first bonding region, and a second notch with a second slant surface aligned with the second bonding region formed on the second surface and encompassed the first open window and the second open window; a first flexible printed circuit board formed on the optical waveguide film; and a first optoelectronic device and a second optoelectronic device mounted in the first bonding region and the second bonding region of the intrinsic film.

Described herein are photonic systems and devices including a optical interface unit disposed on a bottom side of a photonic integrated circuit (PIC) to receive light from an emitter of the PIC. A top side of the PIC includes a flip-chip interface for electrically coupling the PIC to an organic substrate via the top side. An alignment feature corresponding to the emitter is formed with the emitter to be offset by a predetermined distance value; because the emitter and the alignment feature are formed using a shared processing operation, the offset (i.e., predetermined distance value) may be precise and consistent across similarly produced PICs. The PIC comprises a processing feature to image the alignment feature from the bottom side (e.g., a hole). A heat spreader layer surrounds the optical interface unit and is disposed on the bottom side of the PIC to spread heat from the PIC.

Various embodiments include an electro-optical circuit with an optical transmission path comprising: an electro-optical assembly having an optical transmitter element and/or an optical receiver element mounted on a mounting surface of a carrier component; a circuit carrier with a mounting side and an embedded optical waveguide exposed with an end face in a cutout in the mounting side; and an optical interface between the electro-optical assembly and the optical waveguide. The optical transmitter element and/or the optical receiver element is mounted on the carrier component with an alignment of its respective optical axis parallel to the mounting surface. The optical assembly is mounted on the circuit carrier with the mounting surface facing toward the mounting side. The optical transmitter element and/or the optical receiver element projects into the cutout and forms an optical axis with the exposed optical waveguide.

A semiconductor package structure includes a first semiconductor die having an active surface and a passive surface opposite to the active surface, a conductive element leveled with the first semiconductor die, a first redistribution layer (RDL) being closer to the passive surface than to the active surface, a second RDL being closer to the active surface than to the passive surface, and a second semiconductor die over the second RDL and electrically coupled to the first semiconductor die through the second RDL. A first conductive path is established among the first RDL, the conductive element, the second RDL, and the active surface of the first semiconductor die.

Described herein are photonic systems and devices including a optical interface unit disposed on a bottom side of a photonic integrated circuit (PIC) to receive light from an emitter of the PIC. A top side of the PIC includes a flip-chip interface for electrically coupling the PIC to an organic substrate via the top side. An alignment feature corresponding to the emitter is formed with the emitter to be offset by a predetermined distance value; because the emitter and the alignment feature are formed using a shared processing operation, the offset (i.e., predetermined distance value) may be precise and consistent across similarly produced PICs. The PIC comprises a processing feature to image the alignment feature from the bottom side (e.g., a hole). A heat spreader layer surrounds the optical interface unit and is disposed on the bottom side of the PIC to spread heat from the PIC.

Optoelectronic systems and methods of assembly thereof are described herein according to the present disclosure. An example of an optoelectronic described herein includes a substrate and an interposer coupled to the substrate including one or more optical emitters and one or more photodetectors to be mounted thereto. The interposer is fabricated with one or more mechanical datums located on the interposer with respect to flip chip pads to position and couple the optical emitters and photodetectors to the interposer. The optoelectronic system also includes an optical connector and an optical socket that includes one or more mechanical datums corresponding to the mechanical datums of the interposer. The optical socket is configured to align the optical connector with the optical emitters and the photodetectors when the optical socket is coupled to the substrate and the optical connector is received within the optical socket. The mechanical datums of the optical socket contact respective mechanical datums of the interposer when the optical socket is coupled to the substrate.

Solder-pinning metal pads for electronic components and techniques for use thereof to mitigate de-wetting are provided. In one aspect, a structure includes: a substrate; and a solder pad on the substrate, wherein the solder pad has sidewalls extending up from a surface thereof. For instance, the sidewalls can be present at edges of the solder pad, or inset from the edges of the solder pad. The sidewalls can be vertical or extend up from the solder pad at an angle. The sidewalls can be formed from the same material or a different material as the solder pad. A method is also provided that includes forming a solder pad on a substrate, the solder pad comprising sidewalls extending up from a surface thereof.

A package assembly includes a silicon photonics chip having an optical waveguide exposed at a first side of the chip and an optical fiber coupling region formed along the first side of the chip. The package assembly includes a mold compound structure formed to extend around second, third, and fourth sides of the chip. The mold compound structure has a vertical thickness substantially equal to a vertical thickness of the chip. The package assembly includes a redistribution layer formed over the chip and over a portion of the mold compound structure. The redistribution layer includes electrically conductive interconnect structures to provide fanout of electrical contacts on the chip to corresponding electrical contacts on the redistribution layer. The redistribution layer is formed to leave the optical fiber coupling region exposed. An optical fiber is connected to the optical fiber coupling region in optical alignment with the optical waveguide within the chip.