Disclosed are a display device, a multi-screen display device using the same, which include a minimized bezel area and a method for manufacturing the display device. The display device including a display substrate including a plurality of subpixels respectively provided in a plurality of pixel areas defined by a plurality of data lines and a plurality of gate lines, a line substrate bonded to the display substrate by using a substrate bonding member and including a plurality of data routing lines, and a side data connection member provided on one side of each of the display substrate and the line substrate to connect the plurality of data lines to the plurality of gate lines in a one-to-one relationship.

The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.

A wiring structure includes a structure body including a pattern, a first conductive layer above the structure body, the first conductive layer having a shape, the shape crossing an edge of a pattern of the structure body and reflecting a step of the edge of the pattern of the structure body, a first insulating layer above the first conductive layer, the first insulating layer having a first opening overlapping the edge of the pattern of the structure body in a plane view, and r is arranged with a second opening in a region overlapping the semiconductor layer in a plane view, a second conductive layer in the first opening, the second conductive layer being connected to the first conductive layer.

Disclosed is an array substrate, a display panel, and a display apparatus, and belongs to the field of displays. The array substrate includes: a base substrate, including a display region and a peripheral region surrounding the display region; a plurality of clock lines, disposed on the base substrate and in the peripheral region, wherein the clock lines extend in a first direction; a plurality of clock leads, disposed on the base substrate and in the peripheral region, wherein the clock leads extend in a second direction, and the first direction intersects with the second direction; a plurality of shift register units, disposed on the base substrate and in the peripheral region, wherein the shift register units are connected to the clock lines by the clock leads; and compensation capacitor plates, disposed on the base substrate and in the peripheral region, wherein the compensation capacitor plates are connected to the clock leads, the compensation capacitor plates and the clock leads are in different layers, and an area of the compensation capacitor plate is negatively correlated with a length of a clock lead connected to the compensation capacitor plate.

In one embodiment, a display device includes a display area, a peripheral area, scanning lines, signal lines, a first driver in the peripheral area, and a second driver in the peripheral area. The display area has an arc-shaped corner. The first driver includes first and second buffers configured to apply voltage to the scanning lines, a first shift register unit configured to control the first buffer unit, and a second shift register unit configured to control the second buffer unit. At the corner, extension directions of the first buffer unit and the first shift register unit are equal to each other. Extension directions of the second buffer unit and the second shift register unit are different from each other.

A display panel and an electronic device are disclosed. The display panel includes a display area and a functional area. The functional area includes a first switch transistor, a second switch transistor, a sensing transistor, and a sensing capacitor. Specifically, an upper plate of the sensing capacitor is a transparent plate. The functional area can also serve a displaying function while performing color temperature sensing, gas sensing, or laser sensing, which increases an aperture ratio and transmittance of the display panel, so that an overall visual effect of the display panel is improved.

An active matrix substrate includes a plurality of thin film transistors including an oxide semiconductor layer, an interlayer insulating layer, a plurality of pixel electrodes arranged above the interlayer insulating layer, a common electrode arranged between the pixel electrode and the interlayer insulating layer and also configured to function as a touch sensor electrode, a first dielectric layer arranged between the interlayer insulating layer and the common electrode, a second dielectric layer arranged between the common electrode and the pixel electrode, a plurality of touch wiring lines arranged between the interlayer insulating layer and the common electrode and formed of a third conductive film, and a plurality of pixel contact portions, in which each of the plurality of pixel contact portions includes a drain electrode of the thin film transistor, a connection electrode formed of the third conductive film and electrically connected to the drain electrode in a lower opening formed in the interlayer insulating layer, and a pixel electrode electrically connected to the connection electrode in an upper opening formed in the first dielectric layer and the second dielectric layer.

A display panel and an electronic device with a narrow lower border. The display panel includes a left border, a right border and a lower border. The lower border has a length direction extending from the left border to the right border. The lower border is provided with a first detection area, a first installation area, a bonding area, a second installation area and a second detection area which are arranged sequentially along the length direction. The bonding area is used to bond a flexible circuit board. The first installation area is used to install a first driving chip. The second installation area is used to install a second driving chip. The first detection area and the second detection area are used to transmit test signals to the display panel before bonding the flexible circuit board and before installing the first driving chip and the second driving chip.

A curved display panel and a method for manufacturing the same are provided. The curved display panel includes a plurality of clock buses, the clock buses extend along a first direction and are arranged along a second direction, the widths of the plurality of clock buses are different in the second direction, so that capacitance values between several clock buses and a clock signal line disconnected from the several clock buses are the same.

A display device defines a display area and a non-display area and includes a thin film transistor array substrate, a circuit board, and a light modulating layer. The thin film transistor array substrate includes a glass substrate, a driving circuit, and at least one conductive part. The opposing first and second surfaces of the glass substrate define at least one through hole penetrating both, the through hole accommodating one conductive part which extends to electrically connect the driving circuits on the first and second surfaces. The circuit board is electrically connected to the driving circuit on the first surface. The light modulating layer is in the display area and is on the second surface. The light modulating layer is electrically connected to the driving circuit on the second surface.