A display panel includes a display panel body, a first protective film, a second protective film, and a sealant. The display panel body has a first surface, a second surface opposite to the first surface, and a first through hole that passes through the display panel body and connects the first surface and the second surface. The first protective film is arranged on the first surface and has a second through hole connected to the first through hole. The second protective film is arranged on the second surface. The sealant fills the first through hole, so that a sidewall of the display panel body which is exposed by the first through hole is sealed, and a material of the sealant is a curable material.

An array substrate and a display panel are disclosed. The array substrate includes a base substrate, a driver circuit, and a first chip-on-film structure. The array substrate further includes a plurality of transition modules and a plurality of array lines. A gate driver on array (GOA) circuit is separate from the driver circuit to be independently electrically connected to the transition modules and is connected to the base substrate through the array lines, so that problems of occurrence of corner regions in the array lines and heat likely to be produced in the corner regions can be avoided, and display quality of the display panel can be improved.

A second substrate has detection electrodes of a touch panel, each of pixels has a pixel electrode and a counter electrode, the counter electrode is divided into a plurality of blocks, the counter electrodes of the respective divided blocks are commonly provided for the respective pixels of the plurality of display lines in series, and the counter electrodes also serve as scanning electrodes of the touch panel, and a counter electrode selector circuit that selects the counter electrodes. The counter electrode selector circuit includes an address decoder circuit that selects the counter electrodes of the respective blocks for a given period, and a selector circuit that applies a touch panel scanning voltage to the counter electrode of the block selected by the address decoder circuit, and applies a counter voltage to the counter electrodes of the blocks not selected by the address decoder circuit.

A display panel includes a substrate, a plurality of first signal lines, a plurality of second signal lines, a plurality of pixel units, a plurality of transmitting lines, and a driving chip. The transmitting lines are disposed on the substrate and electrically connected to the second signal lines. The driving chip includes a plurality of first pins, a plurality of second pins, and a driving circuit. The first pins are electrically connected to the first signal lines, and the second pins are electrically connected to the transmitting lines. The first pins and the second pins are disposed alternately and evenly, such that the first signal lines and the transmitting lines do not intersect each other. The transmitting lines are disposed on the substrate evenly.

A liquid crystal display (LCD) and a manufacturing method thereof. The liquid crystal display (LCD), having a display area (AA) and a border area (BB), includes: an array substrate and a color filter (CF) substrate arranged opposite to each other; and a plurality of primary spacers disposed between the array substrate and the CF substrate A circuit board is bonded to an edge of the array substrate. The LCD comprises a distribution change area (CC) which is disposed at a periphery of the circuit board; and a distribution density of the primary spacers in the distribution change area (CC) is greater than a distribution density of the primary spacers in a central portion of the display area (AA).

When an optoelectronic device is manufactured by splitting a composite substrate, a dicing process and a breaking process are performed for a first mother substrate in first splitting that splits the first mother substrate along the periphery of a seal material. A breaking process is performed for a second mother substrate in second splitting that splits the second mother substrate along the periphery of the seal material.

An electro-optical device includes: a liquid crystal panel; a particle aligned type anisotropic conductive film having a plurality of electrically conductive particles that are arranged in a state of being aligned along a first direction and a second direction intersecting with the first direction; and a printed circuit board coupled to a connection terminal portion of the liquid crystal panel via the particle aligned type anisotropic conductive film, wherein the connection terminal portion includes a plurality of connection terminals, a plurality of recessed portions that are arranged in a state of being aligned along a third direction and a fourth direction intersecting with the third direction are formed on a surface of the connection terminal, and at least one of the first direction and the second direction along which the electrically conductive particles are arranged is different in arrangement direction from both the third direction and the fourth direction.

A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of the transistors in each row. Data lines that run perpendicular to the gate lines may be used to distribute image data along columns of pixels. The gate lines may be connected to gate line extensions that run parallel to the data lines. The data lines may each overlap a respective one of the gate line extensions. Vias may be used to connect the gate line extensions to the gate lines. The gate line extensions may all have the same length.

An array substrate and a liquid crystal display panel are provided, wherein the array substrate includes a display area and a non-display area, and a length of one end of via-holes close to the display area is not greater than 12.5 microns. By reducing a length of one end of the via-holes positioned at a boundary position between the display area and the non-display area close to the display area, a flow of polyimide fluid is guided and enables an edge of a polyimide film to cover an area where the via-holes are located.

The present disclosure relates to an array substrate, a method of manufacturing the same and a display device. The array substrate comprises a gate line PAD region and a data line PAD region. In the gate line PAD region of the array substrate, gate-line wirings, which are parallel to the gate lines and are electrically insulated from the gate lines, are provided between adjacent gate lines. In the data line PAD region of the array substrate, data-line wirings, which are parallel to the data lines and are electrically insulated from the data lines, are provided between adjacent data lines. Both of the gate-line wirings and the data-line wirings are conductive wiring segments. By forming the gate-line wirings and the data-line wirings in the PAD region, the ability of resisting scratch of the product can be improved while not deteriorating performance of display of the product.