A display panel includes an array substrate, a color filter substrate, and a liquid crystal layer. The array substrate includes a scan line and a data line; a pixel electrode disposed corresponding to a pixel area; a first thin film transistor configured to electrically connect the pixel electrode to the scan line and the data line; an auxiliary electrode disposed on a same layer as the pixel electrode and arranged around the pixel electrode; and a second thin film transistor configured to electrically connect the auxiliary electrode to the first thin film transistor. Potential received by the pixel electrode and potential received by the auxiliary electrode have a difference.

A display device is provided, including a substrates, a circuit board, and a plurality of wires. The substrates has an upper surface, a lower surface opposite to the upper surface, and a first side connecting the upper surface and the lower surface. The circuit board is disposed on the upper surface, and the plurality of wires is disposed on the upper surface and electrically connects the circuit board. The first side has a vertical portion and a first inclined portion, the vertical portion is substantially vertical to the upper surface and a portion is concave in a cross-sectional view. An included angle between the first inclined portion and the lower surface is greater than 90 degrees and less than 180 degrees, and the first inclined portion is greater than the vertical portion in roughness.

An active matrix substrate has pixel regions, and includes a substrate, pixel TFTs disposed to respectively correspond to the pixel regions, and pixel electrodes electrically connected to the pixel TFTs. The pixel TFTs are each a top gate structure TFT that has an oxide semiconductor layer, a gate insulating layer on the oxide semiconductor layer, and a gate electrode opposing the oxide semiconductor layer with the gate insulating layer therebetween. The gate insulating layer is formed of silicon oxide and includes a lower layer contacting the oxide semiconductor layer, and an upper layer on the lower layer. The lower layer H/N ratio of hydrogen atoms to nitrogen atoms in the lower layer is 1.5 to 5.0. The upper layer H/N ratio of hydrogen atoms to nitrogen atoms in the upper layer is 0.9 to 2.0. The lower layer H/N ratio is larger than the upper layer H/N ratio.

A display panel and a display device are provided. The display panel has a touch side and includes an array substrate and an opposite substrate arranged opposite to each other. The array substrate includes an image sensor array including a plurality of image sensors each including a photosensitive element configured to receive light reflected by a texture touched on the touch side for texture acquisition; the opposite substrate includes a light shielding layer including a plurality of first openings arranged in an array, and the plurality of first openings are in one-to-one correspondence with and partially overlap with the photosensitive elements of the plurality of image sensors in a direction perpendicular to a panel surface of the display panel.

A display panel and a display apparatus are provided in the present disclosure. The display panel includes a plurality of pixel units, where the pixel unit at least includes a color pixel region and a highlighted pixel region. A side of the first substrate facing the second substrate includes a first light-blocking layer, and a side of the second substrate facing the first substrate includes a second light-blocking layer and a color-resist layer. A first light-blocking portion at least includes a first opening and a first sub-portion; and a second light-blocking portion at least includes a second sub-portion and a second opening. An orthographic projection of the second opening onto the first substrate overlaps an orthographic projection of the first sub-portion onto the first substrate; and an orthographic projection of the first opening onto the first substrate overlaps an orthographic projection of the second sub-portion onto the first substrate.

An array substrate, a display panel and a method of fabricating the array substrate are disclosed. The array substrate is applied to the display panel, and includes a substrate, multiple scan lines, multiple data lines, a color filter layer, and a planarization layer. The color filter layer at least includes a plurality of first color filters, at least one of which has a raised portion in a region adjacent to the respective data line, and a middle portion in a region away from the respective data line, where a thickness of the raised portion is greater than that of the middle portion. The planarization layer defines at least one first elongated groove corresponding to the raised portion and extending along an extending direction of the data lines. The pixel electrode branch and/or the common electrode branch disposed corresponding to the raised portion is disposed in the respective first elongated groove.

A liquid crystal display is provided. The liquid crystal display includes a first substrate. The liquid crystal display also includes a plurality of first thin film transistors disposed on the first substrate. The liquid crystal display further includes a second substrate disposed opposite to the first substrate. In addition, the liquid crystal display includes a plurality of second thin film transistors disposed on the second substrate. The liquid crystal display also includes a plurality of sensing units disposed on the second substrate, and at least one of the plurality of sensing units electrically connected to at least one of the plurality of second thin film transistors. The liquid crystal display further includes a liquid crystal layer disposed between the first substrate and the second substrate.

The present disclosure provides a COA substrate and a liquid crystal display panel, the COA substrate comprises a plurality of crisscrossed data lines and scan lines, and a pixel unit composed of the data lines and the scan lines. The pixel unit is divided into an opening region of the pixel unit and a non-opening region of the pixel unit. The data lines, the scan lines, transistor units, a data line black matrix less (DBS) common electrode line, and a pixel through-hole are electrically connected to the transistor unit, which are disposed in the non-opening region. The DBS common electrode line in the non-opening region of the pixel unit bypasses the pixel through-hole.

A display substrate and a display panel are provided. The display substrate includes: a display region; a frame region at least partially surrounding the display region; a black matrix including a first part in the display region and a second part in the frame region; and an alignment mark which is in the frame region and at a side of the second part of the black matrix away from the display region, and is spaced apart from the black matrix. A planar shape of the second part of the black matrix has a corner part, the alignment mark is opposite to the corner part, and an outer contour of the corner part opposite to the alignment mark includes a concave part which is concave towards the display region.

A display panel, a display device, and a driving method therefor, the display panel comprising: a plurality of sub-pixels arranged in an array, and the display panel comprising: a first substrate and a second substrate disposed opposite each other, wherein the first substrate comprises a first base and a plurality of pixel electrodes disposed on the first base, and each sub-pixel comprises at least two pixel electrodes.