The present disclosure relates to display panels. The display panels may include an array substrate. The array substrate may include a base substrate, a reflective layer on a surface of the base substrate, and a plurality of reflective color films distributed at intervals in an array mode on a surface of the reflective layer opposite from the base substrate. The plurality of reflective color films may be configured to enable a light being reflected by the reflective layer and then passing through one of the plurality of the reflective color films to have a color.

A display device includes: first and second substrates; adjacent first and second color filter layers between the first and second substrates and having a first color; adjacent third and fourth color filter layers between the first and second substrates and having a second color; first and second dummy color filter layers between the first color filter layer and the second color filter layer and having the first and second colors, respectively; a first column spacer between the first dummy color filter layer and the second substrate; and a second column spacer between the second dummy color filter layer and the second substrate. The first dummy color filter has a greater height than the second dummy color filter layer. A surface of the first dummy color filter layer facing the second substrate is larger than that of the second dummy color filter layer.

The present application provides an array substrate, a manufacturing method of the array substrate, and a liquid crystal display panel. The array substrate includes first common wirings disposed in a same layer as gate wirings and formed as discontinuous segments, and second common wirings disposed in a same layer as source/drain wirings. The first common wirings are electrically connected to the second common wirings. More openings are provided between the gate wirings and the first common wirings formed as discontinuous segments for a flow of an etchant, so that the first common wirings and the gate wirings are prevented from being formed too thin or broken due to an accumulation of the etchant.

A display panel including a thin film transistor array substrate, a color filter substrate, a gold ball, a color resist bump, a first transparent electrode, and a second transparent electrode is provided. The first transparent electrode covers the color resist bump and is connected to the second transparent electrode at a top of the color resist bump. The display panel disclosed in the present invention improves stability of a common electrode signal by constructing a new electrode signal channel, and prevents a technical problem of horizontal crosstalk on the display panel.

An array substrate, a method for fabricating the same, and a display panel are provided. The array substrate includes a first metal layer, a first insulating layer, a second metal layer, a second insulating layer, and a third metal layer. The first metal layer includes a first data line and a first vertical scan line. The second metal layer includes a horizontal scan line. The third metal layer includes a second data line and a second vertical scan line. The second data line is connected to the first data line through a first via hole. The second vertical scan line is connected to the first vertical scan line through a second via hole. The second vertical scan line is connected to the horizontal scan line through a third via hole. The first via hole, the second via hole, and the third via hole are formed by a same manufacturing process.

A pixel unit includes: a first insulating layer; a first pixel electrode located on a first side of the first insulating layer and including a plurality of first electrode strips; a common electrode located on the first side of the first insulating layer and including a plurality of second electrode strips, the second electrode strips and the first electrode strips being sequentially and alternately arranged in a first direction, and slits each being disposed between a second electrode strip in the second electrode strips and a first electrode strip in the first electrode strips that are adjacent to each other; and a second pixel electrode located on a second side of the first insulating layer. The second side of the first insulating to layer is opposite to the first side of the first insulating layer. The second pixel electrode is overlapped with at least a region where the slits are located.

According to one embodiment, an array substrate includes a semiconductor layer, scanning and signal lines, first and second insulating layers, a pedestal and a pixel electrode. The scanning line is opposed to the semiconductor layer. The first insulating layer is provided above the semiconductor layer. The signal line and the pedestal are connected to the semiconductor layer through first and second contact holes in the first insulating layer. The second insulating layer is provided above the pedestal. The pixel electrode is connected to the pedestal through a third contact hole in the second insulating layer. The signal line and the pedestal are provided in layers different from each other.

A display substrate includes a base substrate and a plurality of insulating layers disposed on a surface of the base substrate. A groove is defined in the insulating layers in a non-display area of the display substrate. An end portion of an alignment layer is disposed in the groove. The groove is capable of controlling a flow of a liquid alignment material to prevent the liquid alignment material from overflowing to an edge of the base substrate. The groove is formed simultaneously in a process of forming contact holes in a display area of the display substrate. Accordingly, a structure corresponding to the end portion of the alignment layer to control the flow of the liquid alignment material is formed without increasing the number of masks.

An array substrate, which is provided with a plurality of sub-pixel regions arranged in an array, the plurality of sub-pixel regions comprising a plurality of white sub-pixel regions and a plurality of primary-color sub-pixel regions. The array substrate comprises a first substrate, and a plurality of sub-pixels arranged on one side of the first substrate. The plurality of sub-pixels comprise a plurality of white sub-pixels and a plurality of primary-color sub-pixels. In the column direction, each white sub-pixel is adjacent to at least one primary-color sub-pixel. Each sub-pixel has a plurality of light-shielding patterns. In the column direction, from among a plurality of light-shielding patterns of one primary-color sub-pixel which is adjacent to the white sub-pixel, some light-shielding patterns are arranged in the white sub-pixel region where the white sub-pixel is located, and the remaining light-shielding patterns are arranged in the primary-color sub-pixel region corresponding to the primary-color sub-pixel.

According to one embodiment, a display device includes a first substrate, a second substrate opposed to the first substrate, and a liquid crystal layer provided between the first substrate and the second substrate. The first substrate includes a first signal line and a second signal line and being adjacent to each other in a first direction, a first scanning line and a second scanning line and being adjacent to each other in a second direction intersecting the first direction, a semiconductor layer connected to the first signal line and the first scanning line, a first transparent electrode in contact with the semiconductor layer, an organic insulating layer including a contact hole, and a second transparent electrode in contact with the first transparent electrode.