A display panel and method of manufacturing the same are provided. The method of manufacturing the display panel includes the steps of providing a substrate, forming a gate on the substrate, forming a gate insulating layer on the gate and the substrate, forming a polysilicon layer on the gate insulating layer, performing a first gray-scale mask process on the polysilicon layer to form a source region, a drain region and an active region located between the source region and the drain region by the polysilicon layer, forming an interlayer dielectric layer on the gate insulating layer and the polysilicon layer, forming a first electrode layer on the interlayer dielectric layer, performing a second gray-scale mask process on the first electrode layer and the interlayer dielectric layer.

A pixel electrode or a common electrode is a light-transmissive conductive film; therefore, it is formed of ITO conventionally. Accordingly, the number of manufacturing steps and masks, and manufacturing cost have been increased. An object of the present invention is to provide a semiconductor device, a liquid crystal display device, and an electronic appliance each having a wide viewing angle, less numbers of manufacturing steps and masks, and low manufacturing cost compared with a conventional device. A semiconductor layer of a transistor, a pixel electrode, and a common electrode of a liquid crystal element are formed in the same step.

An array substrate and a manufacturing method thereof, a motherboard and a display device are disclosed. The array substrate has a display region and a non-display region, and includes a base substrate, and a plurality of signal lines and at least one transfer electrode that are on the base substrate. The plurality of signal lines extend from the display region to the non-display region along a first direction, at least one of the plurality of signal lines includes a first trace in the display region and a second trace in the non-display region, the second trace includes at least two sub-traces disconnected from each other, a sub-trace, close to the display region, of the at least two sub-traces of the second trace is directly connected with the first trace, and every two adjacent sub-traces of the second trace are electrically connected with each other.

A change in electrical characteristics of a semiconductor device including an interlayer insulating film over a transistor including an oxide semiconductor as a semiconductor film is suppressed. The structure includes a first insulating film which includes a void portion in a step region formed by a source electrode and a drain electrode over the semiconductor film and contains silicon oxide as a component, and a second insulating film containing silicon nitride, which is provided in contact with the first insulating film to cover the void portion in the first insulating film. The structure can prevent the void portion generated in the first insulating film from expanding outward.

A pixel array substrate including a substrate, a plurality of pixel structures, and a flat layer is provided. The pixel structures are correspondingly disposed in pixel regions of the substrate. At least one of pixel structure includes an active element, a reflective electrode, and an auxiliary electrode. The reflective electrode is electrically connected to the active element. The auxiliary electrode is electrically connected to the reflective electrode and the active element. A vertical projection of the reflective electrode on the substrate overlaps a vertical projection of the auxiliary electrode on the substrate. An area of the vertical projection of the reflective electrode on the substrate is not greater than an area of the vertical projection of the auxiliary electrode on the substrate. The flat layer is disposed between the auxiliary electrode and the active element. A display device by using the pixel array substrate is also provided.

Provided is a display panel. The display panel comprises an array substrate and a color filter substrate, wherein the color filter substrate comprises a second substrate and a black matrix pattern, wherein the black matrix pattern comprises a body, via hole shielding parts, and compensation shielding parts, the via hole shielding parts being disposed within first domains of part of plurality of sub-pixel regions, the compensation shielding parts being disposed within second domains that are adjacent in first direction to the first domains where the via hole shielding parts are disposed, and at most one of the via hole shielding part and the compensation shielding part being disposed in one sub-pixel region.

An array substrate and a touch display device. The array substrate includes a touch signal line, a common electrode and a first pixel electrode on a substrate. The first pixel electrode includes a first edge and a second edge arranged along the first direction and extending along the second direction, the touch signal line extends along the second direction, and the touch signal line is located between the first edge and the second edge. The via hole connection part of the touch signal line is electrically connected to the common electrode through the touch line via hole, and a size of the via hole connection part in the first direction is greater than a size of a portion of the touch signal line in the first direction, and the portion of the touch signal line is adjacent to the via hole connection part.

An active matrix substrate includes a first pixel region defined by first and second source bus lines adjacent to each other and first and second gate bus lines adjacent to each other and further includes a first pixel electrode and a first oxide semiconductor TFT that are associated with the first pixel region. The first oxide semiconductor TFT includes an oxide semiconductor layer and a gate electrode electrically connected to the first gate bus line. The oxide semiconductor layer includes a channel region and a low-resistance region including first and second regions located on opposite sides of the channel region. When viewed in a direction normal to the substrate, the low-resistance region extends across the first source bus line to another pixel region and partially overlaps a pixel electrode disposed in the other pixel region with an insulating layer interposed therebetween.

The present invention is for a backplane substrate including an in-cell type touch panel advantageous to reducing the number of masks and the number of processes, a liquid crystal display device including the same, and a method of manufacturing the same, includes a plurality of interlayer dielectric layers disposed above a drain electrode of a thin film transistor are simultaneously patterned after forming a sensing line and a common electrode.

The disclosure relates to an array substrate. The array substrate may include a base substrate, an auxiliary electrode, a thin film transistor, a first insulating layer, a first electrode, a second insulating layer, and a second electrode sequentially arranged in a direction away from the base substrate. The auxiliary electrode is between the first insulating layer and the second insulating layer and insulated from the first electrode, the auxiliary electrode is coupled to a drain of the thin film transistor through a first via hole in the first insulating layer, and the second electrode is coupled to the auxiliary electrode through a second via hole in the second insulating layer.