A first pixel electrode and a third pixel electrode are disposed on one side of one of a plurality of column lines. A second pixel electrode and a fourth pixel electrode are disposed on another side of the one of the plurality of column lines. A third switching element is disposed on the one side of the one of the plurality of column lines. A fourth switching element is disposed on the other side of the one of the plurality of column lines. The first pixel electrode is connected to a first switching element via a first connection electrode. The second pixel electrode is connected to a second switching element via a second connection electrode. The third pixel electrode is connected to the third switching element. The fourth pixel electrode is connected to the fourth switching element.

A display device with less light leakage and excellent contrast is provided. A display device having a high aperture ratio and including a large-capacitance capacitor is provided. A display device in which wiring delay due to parasitic capacitance is reduced is provided. A display device includes a transistor over a substrate, a pixel electrode connected to the transistor, a signal line electrically connected to the transistor, a scan line electrically connected to the transistor and intersecting with the signal line, and a common electrode overlapping with the pixel electrode and the signal line with an insulating film provided therebetween. The common electrode includes stripe regions extending in a direction intersecting with the signal line.

According to one embodiment, a display device includes pixel circuits arranged in a matrix in a display area, and the pixel circuits each includes a display element, a capacitor which applies voltage to at least one of electrodes of the display element, a first switch which supplies voltage to the capacitor when in an on state, a second switch which is set in an off state with the first switch when the first switch is in the off state, and sets the capacitor in a floating state.

Display data of pixels is updated at different timings. A scan line is connected to a first pixel and a second pixel, a first wiring is connected to the first pixel, and a second wiring is connected to the second pixel. In a first period, a signal for selecting the first pixel and the second pixel is supplied to the scan line. Setting data for setting a state where the display data of the first pixel is updated is supplied to the first wiring, and setting data for setting a state where the display data of the second pixel is updated is supplied to the second wiring. In a second period, a signal for selecting the first pixel and the second pixel is supplied to the scan line. Setting data for setting a state where the display data of the first pixel is not updated is supplied to the first wiring, and the setting data for setting the state where the display data of the second pixel is updated is supplied to the second wiring. In a third period, the first pixel displays first display data, and the second pixel displays second display data.

An object is to provide a display device that performs accurate display. A circuit is formed using a transistor that includes an oxide semiconductor and has a low off-state current. A precharge circuit or an inspection circuit is formed in addition to a pixel circuit. The off-state current is low because the oxide semiconductor is used. Thus, it is not likely that a signal or voltage is leaked in the precharge circuit or the inspection circuit to cause defective display. As a result, a display device that performs accurate display can be provided.

A liquid crystal display includes: a first substrate; a gate line disposed on the first substrate; a first data line and a second data line disposed on the first substrate; a first thin film transistor connected to the gate line and to the first data line; a first subpixel electrode connected to the first thin film transistor; a second thin film transistor connected to the gate line and to the second data line; a second subpixel electrode connected to the second thin film transistor; a third thin film transistor connected to the gate line and to the first data line; a fourth thin film transistor connected to the gate line and to the second data line; and a third subpixel electrode connected to the third and fourth thin film transistors.

The disclosure provides a display device including a first display panel and a second display panel. The second display panel is disposed above the first display panel. The first display panel includes a first pixel unit. The first pixel unit includes a first sub-pixel and a second sub-pixel, where the first sub-pixel and the second sub-pixel are connected in parallel. The display device of the disclosure has better yield.

An active matrix substrate includes a gate metal layer, a source metal layer, an interlayer insulating layer, a first transparent conductive layer and second transparent conductive layer formed on or above the interlayer insulating layer, and a lower metal layer formed below the gate metal layer. The lower metal layer includes a plurality of CS bus lines each extending in a column direction and not overlapping a plurality of source bus lines. Each of the plurality of pixels has a drain extension section extending from a drain electrode, a first transparent electrode, a second transparent electrode connected to the drain extension section, and an auxiliary capacitor electrode that includes the lower metal layer and/or the gate metal layer, is electrically connected to at least any one of the plurality of CS bus lines, and overlaps the drain extension section when viewed in a normal direction of the substrate.

A display device includes a substrate, a first data line, a scan line, a first sub-pixel, a passivation layer, and a common electrode. The first sub-pixel includes a first main-driving element, a first sub-driving element, a first capacitor electrode, and a first pixel electrode. The first main-driving element includes a first main-gate, a first main-channel layer, a first main-source, and a first main-drain. The first sub-driving element includes a first sub-gate, a first sub-channel layer, a first sub-source, and a first sub-drain. The first capacitor electrode is electrically connected with the first main-drain and the first sub-source. The first pixel electrode is electrically connected with the first sub-drain. The common electrode and the first capacitor electrode have a first main capacitor therebetween. The common electrode and the first pixel electrode have a first sub capacitor therebetween.

Provided are a display device its method of manufacturing. The device includes a base; first and second thin-film transistors (TFT) on the base, adjacent to each; an organic layer covering the first and second TFT, comprising a first and second opening overlapping the drain electrodes of the first and second TFT, respectively; a common electrode on the organic layer comprising a common electrode opening overlapping the first opening and another common electrode opening overlapping the second opening; an insulating layer on a bump spacer which is on the common electrode; a first and second pixel electrode on the insulating layer overlapping the common electrode and electrically connected to the first and second TFT, respectively, wherein a minimum distance between the bump spacer and the common electrode opening is substantially equal to a minimum distance between the bump spacer and the other common electrode opening.