A display is described which comprises a plurality of pixels (12), wherein each pixel (12) comprises a plasmonic resonator (26) including first and second metallic material elements (16, 22) and incorporating a layer (18) of a phase change material, the plasmonic resonator (26) being arranged such that in one material state of the phase change material (18) the electric field coupling between the second metallic material element (22) and the phase change material layer (18) is strong and so strong absorption of selected wavelengths of the incident light occurs, whereas in another state of the phase change material (18) the electric field coupling between the metallic material elements (16, 22) and the phase change material layer (18), and between the first and second metallic material elements (16, 22) is weak and so re-radiation of incident light occurs, the pixel (12) being of high reflectance.

A novel liquid crystal on silicon (LCoS) device includes an array of pixel electrodes having a highly reflective material formed thereon. In a particular embodiment, the pixel electrodes are aluminum and have silver pixel mirrors electroplated thereon. In a more particular embodiment, the LCoS device includes auxiliary circuitry facilitating the electroplating of the pixel mirrors.

A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

Display panel and display device are provided. The display panel includes a plurality of pixels and a blocking metal wire. The pixel includes a display unit and a control unit driving the display unit. The display unit at least includes a heating element and a phase change material layer. The heating element includes a first connecting terminal and a second connecting terminal. The control unit includes a first signal terminal and a second signal terminal. The control unit includes at least one diode, which includes a diode semiconductor layer including a first electrode contact region, a second electrode contact region and a connecting region. The blocking metal wire covers the connecting region and is insulated from the connecting region. The blocking metal wire is electrically connected to each of the first signal terminal and the first signal source or to each of the second connecting terminal and the second signal source.

A liquid crystal panel includes a pair of substrates, a seal part between the pair of substrates and in a non-display region to surround and seal the liquid crystal layer, a planarizing film and a second interlayer insulating film being insulating films on the array substrate across a display region and the non-display region, an alignment film on the array substrate closer to the liquid crystal layer than the planarizing film and the second interlayer insulating film are, the alignment film being disposed across the display region and the non-display region, and a defining part formed of the planarizing film and the second interlayer insulating film, which are insulating films, the defining part being disposed at a position overlapping with the seal part in the non-display region, to define an alignment film non-disposed region where the alignment film is not disposed.

A liquid crystal panel includes a pair of substrates, a seal part between the pair of substrates and in a non-display region to surround and seal the liquid crystal layer, a planarizing film and a second interlayer insulating film being insulating films on the array substrate across a display region and the non-display region, an alignment film on the array substrate closer to the liquid crystal layer than the planarizing film and the second interlayer insulating film are, the alignment film being disposed across the display region and the non-display region, and a defining part formed of the planarizing film and the second interlayer insulating film, which are insulating films, the defining part being disposed at a position overlapping with the seal part in the non-display region, to define an alignment film non-disposed region where the alignment film is not disposed.

A TFT substrate includes a dielectric substrate and a plurality of antenna unit regions arranged on the dielectric substrate. Each of the plurality of antenna unit regions includes a TFT, a patch electrode electrically connected to a drain electrode of the TFT, and a patch drain connection section electrically connecting the drain electrode to the patch electrode, and the patch drain connection section includes a conductive portion included in a conductive layer, the conductive layer being closer to the dielectric substrate than a conductive layer including the patch electrode and being either one of a conductive layer including a gate electrode of the TFT or a conductive layer including a source electrode of TFT, the either one being closer to the dielectric substrate than the other.

A novel liquid crystal on silicon (LCoS) device includes an array of pixel electrodes having a highly reflective material formed thereon. In a particular embodiment, the pixel electrodes are aluminum and have silver pixel mirrors electroplated thereon. In a more particular embodiment, the LCoS device includes auxiliary circuitry facilitating the electroplating of the pixel mirrors.

A pixel structure includes a substrate, a first metal layer, a first insulating layer, a conductive layer, a second insulating layer, and a second metal layer. The first metal layer is located on a substrate. The first metal layer includes a data line and a source connected to the data line. The first insulating layer covers the first metal layer. The conductive layer is located on the first insulating layer. The conductive layer includes a semiconductor channel and a first electrode. The semiconductor channel is electrically connected to the source. At least one portion of the first electrode is located in an opening area of the pixel structure. The second insulating layer covers the conductive layer. The second metal layer is located on the second insulating layer. The second metal layer includes a scan line and a gate connected to the scan line. The gate overlaps the semiconductor channel.