A thin film transistor, an array substrate and a display device. The thin film transistor includes a gate electrode, a first electrode, and a second electrode on the base substrate. The gate electrode includes a first body portion and a first extension portion extending along the first direction, electrically connected with the first body portion, and spaced apart from the first body portion by a first spacing. The first electrode includes a first overlapping end, an orthographic projection of the first overlapping end on the base substrate at least partially overlaps with an orthographic projection of the first body portion on the base substrate; a first compensation end at a side of the first overlapping end away from the first body portion; and a first intermediate portion connecting the first overlapping end and the first compensation end.

A thin film transistor, an array substrate and a display device. The thin film transistor includes a gate electrode, a first electrode, and a second electrode on the base substrate. The gate electrode includes a first body portion and a first extension portion extending along the first direction, electrically connected with the first body portion, and spaced apart from the first body portion by a first spacing. The first electrode includes a first overlapping end, an orthographic projection of the first overlapping end on the base substrate at least partially overlaps with an orthographic projection of the first body portion on the base substrate; a first compensation end at a side of the first overlapping end away from the first body portion; and a first intermediate portion connecting the first overlapping end and the first compensation end.

A thin film transistor array substrate includes an insulating substrate, a plurality of data lines, a plurality of common electrodes, and a common electrode layer. The insulating substrate defines a plurality of sub-pixel area arranged into a sub-pixel array including a plurality of rows and a plurality of columns. The plurality of data lines extend in a direction of the columns in the sub-pixel array. The plurality of common electrodes extend in the direction of the columns in the sub-pixel array. At least two of the plurality of data lines are between adjacent common electrodes of the plurality of common electrodes, and the plurality of common electrodes are applied with a same voltage. The common electrode layer is on the insulating substrate and the common electrodes are connected to different locations of the common electrode layer.

A thin film transistor array substrate includes an insulating substrate, a plurality of data lines, a plurality of common electrodes, and a common electrode layer. The insulating substrate defines a plurality of sub-pixel area arranged into a sub-pixel array including a plurality of rows and a plurality of columns. The plurality of data lines extend in a direction of the columns in the sub-pixel array. The plurality of common electrodes extend in the direction of the columns in the sub-pixel array. At least two of the plurality of data lines are between adjacent common electrodes of the plurality of common electrodes, and the plurality of common electrodes are applied with a same voltage. The common electrode layer is on the insulating substrate and the common electrodes are connected to different locations of the common electrode layer.

An array substrate is provided. One of a first electrode layer and a second electrode layer in the array substrate includes at least one slit electrode. The slit electrode is disposed between two adjacent data leads in the array substrate, and includes an electrode connecting portion and a plurality of first strip-shaped sub-electrodes. The electrode connecting portion includes a first connecting section parallel to and adjacent to the data lead, and a distance between two adjacent first strip-shaped sub-electrodes in a direction parallel to an extending direction of the first connecting section gradually increases along a direction going away from the first connecting section.

An array substrate is provided. One of a first electrode layer and a second electrode layer in the array substrate includes at least one slit electrode. The slit electrode is disposed between two adjacent data leads in the array substrate, and includes an electrode connecting portion and a plurality of first strip-shaped sub-electrodes. The electrode connecting portion includes a first connecting section parallel to and adjacent to the data lead, and a distance between two adjacent first strip-shaped sub-electrodes in a direction parallel to an extending direction of the first connecting section gradually increases along a direction going away from the first connecting section.

According to one embodiment, a display device includes a first substrate, a second substrate and a liquid crystal layer. The first substrate includes a base, a sensor and a sensor circuit. The sensor is interposed between the base and the liquid crystal layer in a display area including pixels. The sensor outputs a sensing signal corresponding to light incident from alongside the liquid crystal layer. The sensor circuit includes a plurality of switching elements. The pixels include first to third sub-pixels. At least some of elements of the switching elements are arranged in each of areas where the first to third sub-pixels are arranged. A signal line for the sensor, which outputs the sensing signal, is placed on a same layer as a feeding line connected to the sensor.

According to one embodiment, a display device includes a first substrate, a second substrate and a liquid crystal layer. The first substrate includes a base, a sensor and a sensor circuit. The sensor is interposed between the base and the liquid crystal layer in a display area including pixels. The sensor outputs a sensing signal corresponding to light incident from alongside the liquid crystal layer. The sensor circuit includes a plurality of switching elements. The pixels include first to third sub-pixels. At least some of elements of the switching elements are arranged in each of areas where the first to third sub-pixels are arranged. A signal line for the sensor, which outputs the sensing signal, is placed on a same layer as a feeding line connected to the sensor.

An active matrix substrate is provided with a plurality of oxide semiconductor TFTs including a plurality of first TFTs. An oxide semiconductor layer of each oxide semiconductor TFT includes a channel region, a source contact region, and a drain contact region. In a view from a normal direction of the substrate, the channel region is a region located between the source contact region and the drain contact region and overlapping a gate electrode, and the channel region includes a first end portion and a second end portion that oppose each other and extend in a first direction from the source contact region side toward the drain contact region side, a source side end portion that is located on the source contact region side of the first and second end portions and extends in a second direction that intersects the first direction, and a drain side end portion that is located on the drain contact region side of the first and second end portions and extends in the second direction. Each first TFT further includes a light blocking layer located between the oxide semiconductor layer and the substrate. In a view from the normal direction of the substrate, the light blocking layer includes an opening region that overlaps part of the channel region and a light blocking region that overlaps another part of the channel region. In a view from the normal direction of the substrate, the light blocking region includes a first light blocking portion that extends in the first direction over the first end portion of the channel region and a second light blocking portion that extends in the first direction over the second end portion of the channel region; each of the first light blocking portion and the second light blocking portion includes a first edge portion and a second edge portion that oppose each other and extend in the first direction; at least part of the first edge portion overlaps the channel region; and the second edge portion is located on an outer side of the channel region and does not overlap the channel region.

The present disclosure relates to a display device. A display device according to an embodiment of the present inventive concept includes gate lines extending along a first direction, data lines extending along a second direction, pixels including pixel electrodes, each of the pixels including a transistor connected to a gate line and a data line, and a pixel electrode connected to the transistor, the pixels including a first pixel which includes a first pixel electrode connected to a first data line and is disposed in n.sup.th pixel row and m.sup.th pixel column, and a second pixel which includes a second pixel electrode connected to the first data line or a second data line disposed adjacent to the first data line and is disposed in (n+1).sup.th pixel row and the m.sup.th pixel column. The first data line does not overlap the first pixel electrode and overlaps the second pixel electrode.