An overcurrent protection circuit configured to limit an output current flowing through an output transistor includes a sense transistor that provides a sense current proportional to the output current, a sense resistor through which the sense current flows, a current limiting circuit that detects a sense voltage generated by the sense resistor and controls a gate voltage of the output transistor, and a current correction circuit that provides the sense resistor with a corrected sense current added to the sense current based on a difference of voltage between a drain voltage of the output transistor and a drain voltage of the sense transistor.

A circuit is disclosed. The circuit includes a first transistor including a first drain terminal, a first gate terminal and a first source terminal, a depletion-mode transistor including a second drain terminal, a second gate terminal and a second source terminal, the second drain terminal connected to the first drain terminal, the depletion-mode transistor arranged to sense a first voltage at the first drain terminal and generate a second voltage at the second source terminal, and a comparator arranged to receive the second voltage, and transition the first transistor from an on state to an off state in response to the first transistor entering its saturation region of operation. In one aspect, the first transistor includes gallium nitride (GaN). In another aspect, the circuit further includes a logic circuit arranged to receive an output voltage generated by the comparator and to drive the first gate terminal.

The present disclosure provides an overcurrent protection circuit, an overcurrent protection method, a clock signal generation circuit and a display device. The overcurrent protection circuit includes N first overcurrent detection circuits, N second overcurrent detection circuits, a first signal generation circuit, a second signal generation circuit, a first level switching circuit, a second level switching circuit and a control circuit. The first signal generation circuit is configured to output a first control signal to the first level switching circuit upon the receipt of a first overcurrent indication signal. The second signal generation circuit is configured to output a second control signal to the second level switching circuit upon the receipt of a second overcurrent indication signal. The control circuit is configured to provide an OFF control signal to an n.sup.th output control module after a predetermined time period upon the receipt of a third control signal and/or a fourth control signal, where N is a positive integer, and n is a positive integer smaller than or equal to N.

A low dropout voltage regulator includes a differential amplifier configured to output an amplified voltage by comparing a feedback voltage with a reference voltage, a pass transistor configured to receive a power input voltage into a source terminal, the amplified voltage into a gate terminal, and output an output voltage into a drain terminal, distribution resistors connected between the drain terminal and the ground terminal, configured to generate the feedback voltage, and an inrush preventer, connected in parallel between the differential amplifier and the pass transistor, and configured to output a regulated amplified voltage into the gate terminal according to a control signal, wherein the inrush preventer comprises a determiner configured to output an enable signal that is turned on during an initial driving period, and a limiter configured to output the regulated amplified voltage according to the enable signal.

Disclosed is a low dropout linear voltage regulator and a control circuit thereof. The control circuit comprises an error amplifier, a foldback current-limiting protection circuit, an undershoot suppression circuit and an output detection circuit. The foldback current-limiting protection circuit limits the output current of power transistor and performs short circuit protection, the undershoot suppression circuit pulls the control terminal of the power transistor to low voltage level when the output voltage undershoots. The output detection circuit judges whether the output voltage rises to a preset voltage value in the startup stage, and before the output voltage rises to the preset voltage value, disables the undershoot suppression circuit and the foldback characteristic of the foldback current-limiting protection circuit, which can prevent normal startup of the circuit from being affected by a maloperation of the foldback current-limiting protection circuit and the undershoot suppression circuit during the startup process, improve on-load startup ability.

Disclosed is a low dropout linear voltage regulator and a control circuit thereof. The control circuit comprises an error amplifier, a foldback current-limiting protection circuit, an undershoot suppression circuit and an output detection circuit. The foldback current-limiting protection circuit limits the output current of power transistor and performs short circuit protection, the undershoot suppression circuit pulls the control terminal of the power transistor to low voltage level when the output voltage undershoots. The output detection circuit judges whether the output voltage rises to a preset voltage value in the startup stage, and before the output voltage rises to the preset voltage value, disables the undershoot suppression circuit and the foldback characteristic of the foldback current-limiting protection circuit, which can prevent normal startup of the circuit from being affected by a maloperation of the foldback current-limiting protection circuit and the undershoot suppression circuit during the startup process, improve on-load startup ability.

Disclosed is a semiconductor integrated circuit for a regulator, including: a voltage control transistor connected between a voltage input terminal to which a DC voltage is input and an output terminal; a control circuit that controls the voltage control transistor according to a feedback voltage of an output; a first transistor which is provided in parallel with the voltage control transistor and to which an electric current in a proportional reduction from an electric current flowing to the voltage control transistor flows; a first comparison circuit that determines which of the electric current flowing to the first transistor and a predetermined current value is larger; and a first output terminal for outputting the determination result. An output of the first comparison circuit is inverted in response to the flowing to the first transistor of the electric current smaller than a preset rotation lock detection current value.

Disclosed is a semiconductor integrated circuit for a regulator, including: a voltage control transistor connected between a voltage input terminal to which a DC voltage is input and an output terminal; a control circuit that controls the voltage control transistor according to a feedback voltage of an output; a first transistor which is provided in parallel with the voltage control transistor and to which an electric current in a proportional reduction from an electric current flowing to the voltage control transistor flows; a first comparison circuit that determines which of the electric current flowing to the first transistor and a predetermined current value is larger; and a first output terminal for outputting the determination result. An output of the first comparison circuit is inverted in response to the flowing to the first transistor of the electric current smaller than a preset rotation lock detection current value.

A circuit comprises an optical coupling including an illuminator optically coupled to an optical sensor to output a voltage from the optical sensor based on intensity of illumination from the illuminator. The circuit includes a voltage input node with a resistance connected in series between the voltage input and a Zener diode. A method includes powering an illuminator with current from a first voltage input node. The method includes sensing illumination level in illumination from the illuminator with a sensor and outputting output proportionate to illumination sensed by the sensor indicative of voltage detected at the voltage input node. The method can include limiting current between the voltage input node and the illuminator.

A circuit comprises an optical coupling including an illuminator optically coupled to an optical sensor to output a voltage from the optical sensor based on intensity of illumination from the illuminator. The circuit includes a voltage input node with a resistance connected in series between the voltage input and a Zener diode. A method includes powering an illuminator with current from a first voltage input node. The method includes sensing illumination level in illumination from the illuminator with a sensor and outputting output proportionate to illumination sensed by the sensor indicative of voltage detected at the voltage input node. The method can include limiting current between the voltage input node and the illuminator.