A driver circuit includes three sub-circuits. A first sub-circuit is configured to generate a drive current output by the driver circuit through an output node during first and second regions of operation and includes: a diode coupled to the output node and a first transistor, and a second transistor coupled to the first transistor and a current mirror. A second sub-circuit is configured to generate the drive current during the first and second and a third region of operation and includes: a third transistor coupled to the output node; and a fourth transistor. A third sub-circuit is configured to generate the drive current during the third region of operation and includes: a current source coupled to the current mirror and a buffer; and a fifth transistor coupled to the third transistor and the fourth transistor and configured to receive an output of the buffer.

A bias circuit includes a mirror current source and a current-to-voltage converter. A first terminal of the mirror current source is connected to a supply voltage terminal, a second terminal of the mirror current source is connected to a reference voltage terminal, and a third terminal of the mirror current source is connected to the current-to-voltage converter. A mirror current source is configured to acquire a supply voltage transmitted at the supply voltage terminal through the first terminal, acquire a reference voltage transmitted at the reference voltage terminal through the second terminal, and regulate the supply voltage by using the reference voltage and a preset parameter to obtain a mirror current corresponding to the supply voltage. The preset parameter is parameter information of the mirror current source. The current-to-voltage converter is configured to convert the mirror current into a voltage to provide a bias voltage based on the voltage.

Methods, systems, and apparatuses for producing a compensated voltage reference. The method includes operating a voltage reference circuit. The method also includes activating a first compensation circuit when an operating temperature is less than or equal to a first temperature threshold. The first compensation circuit is configured to extract a first compensation current from the voltage reference circuit. The method further includes deactivating the first compensation circuit when the operating temperature is greater than the first temperature threshold. The method also includes activating a second compensation circuit when the operating temperature is greater than or equal to a second temperature threshold. The second compensation circuit is configured to extract a second compensation current from voltage reference circuit. The second temperature threshold is greater than the first temperature threshold. The method further includes deactivating the second compensation circuit when the operating temperature is less than the second temperature threshold.

Methods, systems, and devices for apparatus for differential memory cells are described. An apparatus may include a pair of memory cells comprising a first memory cell and a second memory cell, a word line coupled with the pair of memory cells and a plate line coupled with the pair of memory cells. The apparatus may further include a first digit line coupled with the first memory cell and a sense amplifier and a second digit line coupled with the second memory cell and the sense amplifier. The apparatus may include a select line configured to couple the first digit line and the second digit line with the sense amplifier.

An electronic device includes a semiconductor substrate and a bidirectional transistor switch formed on the substrate, the bidirectional switch including a first source node, a second source node and a common drain node. A first transistor is formed on the substrate and includes a first source terminal, a first drain terminal and a first gate terminal, wherein the first source terminal is connected to the substrate, the first drain terminal is connected to the first source node and the first gate terminal is connected to the second source node. A second transistor is formed on the substrate and includes a second source terminal, a second drain terminal and a second gate terminal, wherein the second source terminal is connected to the substrate, the second drain terminal is connected to the second source node and the second gate terminal is connected to the first source node.

In described examples, a circuit includes a first current mirror circuit. The first current mirror circuit is coupled to a power input terminal. A first stage is coupled to the first current mirror circuit, and a second stage is coupled to the first stage and to the first current mirror circuit. An amplifier is coupled to the first and second stages. The amplifier has first and second input terminals. The first input terminal is coupled to the first stage, and the second input terminal is coupled to the second stage. A second current mirror circuit is coupled to the first stage, the second stage and the amplifier.

A neurostimulator incorporating a novel chip design that uses the principle of redundant signal crossfiring to overcome electronic component mismatch error in general and transistor mismatch error in particular, to yield superior quality neurostimulation signal generation, useful in enhancing the bidirectional human-machine interface in prosthesis operation for the restoration of somatosensation for an amputee.

A low-dropout regulator having an output current branch being arranged between a supply line to provide a supply potential and an output node to provide a regulated output voltage. The output current branch includes an output driver to provide an output current at the output node. The output driver has a control connection to apply a control voltage to operate the output driver with a different conductivity in dependence on the control voltage. The LDO includes an input amplifier stage to provide the control voltage to the control connection of the output driver. The input amplifier stage is configured to provide the control voltage with a different slew rate in dependence on an increase or decrease of the output current.

A low-dropout regulator having an output current branch being arranged between a supply line to provide a supply potential and an output node to provide a regulated output voltage. The output current branch includes an output driver to provide an output current at the output node. The output driver has a control connection to apply a control voltage to operate the output driver with a different conductivity in dependence on the control voltage. The LDO includes an input amplifier stage to provide the control voltage to the control connection of the output driver. The input amplifier stage is configured to provide the control voltage with a different slew rate in dependence on an increase or decrease of the output current.

Disclosed is an image sensing device including a current supply circuit coupled between a supply terminal of a first voltage and a pair of output terminals, an input circuit coupled between the pair of output terminals and a common node, and suitable for receiving a pixel signal and a ramp signal, and a mirroring circuit coupled between the common node and a supply terminal of a second voltage, and suitable for compensating for an operating current, which flows between the common node and the supply terminal of the second voltage, based on a reference current when generating the operating current by mirroring the reference current.