Apparatus for data processing and a method of data processing are provided. Shift circuitry performs a shift operation in response to a shift instruction, shifting bits of an input data value in a direction specified by the shift instruction. Bit location indicator generation circuitry and comparison circuitry operate in parallel with the shift circuitry. The bit location indicator indicates at least one bit location in the input data value which must not have a bit set if the shifted data value is not to saturate. Comparison circuitry compares the bit location indicator with the input data value and indicates a saturation condition if any bits are indicated by the bit position indicator for bit locations which hold set bits in the input data value. A faster indication of the saturation condition thus results.

A processing device comprises a register configured to store a count value indicating a number of times overflow events have resulted from arithmetic operations performed by the processing device. An execution unit of the device, in response to performing an arithmetic operation having a result which extends beyond one of the predefined limit values for the floating-point format, stores a result value that is within the predefined limit values, and cause the count value to be incremented. The count value provides a performant way of determining the number of overflow events that have occurred during the arithmetic processing performed by the execution unit. The count value provides a metric that provides a measure of the inaccuracy imparted into the results of the application processing by overflow events.

A first input and a second input are added in hardware logic to determine an output value. receiving The first input comprises a first number of bits and the second input comprises a second number of bits, the second input being wider than the first input. The first input is added to the first number of least significant bits of the second input to determine a carry value. Using a third number of most significant bits of the second input, it is determined whether there is a risk of integer overflow, the third number being equal to the first number subtracted from the second number. The determined carry value and the determined risk of overflow are used to determine whether the addition of the first input and the second input will cause integer overflow. In response to determining that the addition will cause integer overflow, the output value is determined.