G06F9/4825

MICROPROCESSOR WITH TIME COUNTER FOR STATICALLY DISPATCHING INSTRUCTIONS WITH PHANTOM REGISTERS
20230273796 · 2023-08-31 · ·

A processor includes a time counter and provides a method for statically dispatching fused instructions with first operation and second operation with preset execution times for forwarding of result data from the first operation to the second operation without writing to a register, and where the preset execution times are based on a time count from the time counter provided to an execution pipeline.

USER TIMER DIRECTLY PROGRAMMED BY APPLICATION

An embodiment of an apparatus comprises decode circuitry to decode a single instruction, the single instruction to include a field for an identifier of a first source operand, a field for an identifier of a destination operand, and a field for an opcode, the opcode to indicate execution circuitry is to program a user timer, and execution circuitry to execute the decoded instruction according to the opcode to retrieve timer program information from a location indicated by the first source operand, and program a user timer indicated by the destination operand based on the retrieved timer program information. Other embodiments are disclosed and claimed.

Minimizing C-state transitions due to software timer interrupts
11734055 · 2023-08-22 · ·

C-state transitions due to software timer interrupts can be minimized. A timer interrupt synchronizer can be deployed on a computing device to function as an intermediary between software components that rely on timer interrupts and a timer interrupt architecture of the computing device. When the software components request timer interrupts, the timer interrupt synchronizer can ensure that timer interrupts having the same frequency can be synchronized to occur at the same time. As a result of this synchronization, a CPU can experience fewer C-state transitions due to the timer interrupts.

Clock tick interrupt configuration method and apparatus

A method and an apparatus for setting a time for a tick interrupt are disclosed. The method includes performing a compensation for a system time when a tick interrupt is executed; setting a time of a next tick interrupt according to a timeout task and a compensated system time if the timeout task exists when the tick interrupt is executed; and when a system enters into a low power mode after the tick interrupt is executed, correcting the time of the next tick interrupt according to the timeout task that is updated when the low power mode is entered. The present disclosure can decouple logic relationships between tick interrupts and Idle tasks, thereby reduces the number of division operations that involve rounding, reduces such accumulated error associated with compensation time, and improves the accuracy of the system time, as compared to the existing technologies.

IOT DEVICE JOBS
20210344758 · 2021-11-04 ·

The disclosed technology is generally directed to communications in an IoT environment. In one example of the technology, device twins for corresponding IoT devices are stored, wherein the device twins include metadata that is associated with the corresponding IoT devices. A schedule job instruction may be received, and at least one candidate IoT device among the IoT devices that is associated with the schedule job instruction may be identified. In some examples, executors associated with the at least one candidate IoT device are created, and jobs are executed via the executors such that the executors are capable of resuming execution after at least one of an outage or a failure.

INTER-THREAD INTERRUPT SIGNAL SENDING
20230359484 · 2023-11-09 ·

Implementations of the present specification provide an inter-thread interrupt signal sending method and apparatus. In the inter-thread interrupt signal sending method, a processor in which a first thread is located sends a notification message to a PCI device via a PCI bus by using an MMIO write operation. The MMIO write operation is implemented based on a virtual space address of the first thread to which a memory address of an MMIO memory of the PCI device is mapped. The PCI device generates an interrupt signal for a second thread in response to receiving the notification message, and sends the interrupt signal to a processor in which the second thread is located based on an interrupt signal sending manner configured in interrupt configuration information of the PCI device. The interrupt configuration information of the PCI device is pre-configured based on status information of the second thread, and the status information of the second thread includes whether the second thread is running or a running status of the second thread.

PROCESSING INTERRUPT REQUESTS FOR AUTONOMOUS SYSTEMS AND APPLICATIONS
20230376343 · 2023-11-23 ·

In various examples, a timer component that generates an event when an interrupt request has not yet been cleared within at least a predetermined amount of time.

IoT device jobs

The disclosed technology is generally directed to communications in an IoT environment. In one example of the technology, device twins for corresponding IoT devices are stored, wherein the device twins include metadata that is associated with the corresponding IoT devices. A schedule job instruction may be received, and at least one candidate IoT device among the IoT devices that is associated with the schedule job instruction may be identified. In some examples, executors associated with the at least one candidate IoT device are created, and jobs are executed via the executors such that the executors are capable of resuming execution after at least one of an outage or a failure.

Method for booting startup of electronic device, electronic device, and readable storage medium
11269654 · 2022-03-08 · ·

The present disclosure relates to a method for booting startup of an electronic device, an electronic device, and a readable storage medium. The electronic device includes a boot program Boot, an operating system, a preset boot memory, and a display screen, wherein the preset boot memory is configured to store image information. The method for booting startup of an electronic device includes: running the boot program Boot to start up the operating system, and during the startup of the operating system by the boot program Boot, refreshing, by the boot program Boot, the image information stored in the preset boot memory to a controller of the display screen.

Partitioning for delayed queues in a distributed network
11157324 · 2021-10-26 · ·

A timer service receives timer creation requests from clients and fires those timers upon their expiration by returning to the requesting clients payloads provided with the timer creation requests. A timer creation request includes a client identifier, a timer expiration time, and a payload. The timer service queues timer creation requests, a creation worker adds timer records to a timer store in response to requests and manages partitions of the timer store, and sweeper workers, one per partition, sweep timers into a second queue. A firing worker reads timer index records from the second queue, determines the timers referenced in those timer index records and executes the payloads of those timers. The timer store can be tiered, with partitions different storage priorities based on the timer expirations of the timers in the partitions.