Embodiments are generally directed to thread group scheduling for graphics processing. An embodiment of an apparatus includes a plurality of processors including a plurality of graphics processors to process data; a memory; and one or more caches for storage of data for the plurality of graphics processors, wherein the one or more processors are to schedule a plurality of groups of threads for processing by the plurality of graphics processors, the scheduling of the plurality of groups of threads including the plurality of processors to apply a bias for scheduling the plurality of groups of threads according to a cache locality for the one or more caches.

Techniques for optimizing virtual machine (VM) scheduling on a non-uniform cache access (NUCA) system are provided. In one set of embodiments, a hypervisor of the NUCA system can partition the virtual CPUs of each VM running on the system into logical constructs referred to as last level cache (LLC) groups, where each LLC group is sized to match (or at least not exceed) the LLC domain size of the system. The hypervisor can then place/load balance the virtual CPUs of each VM on the system’s cores in a manner that attempts to keep virtual CPUs which are part of the same LLC group within the same LLC domain, subject to various factors such as compute load, cache contention, and so on.

The one or more programs stored in a computer-readable storage medium according to various embodiments include instructions cause the first electronic device to receive, from a third electronic device, a first signal related to a user input to access a character corresponding to a user of the third electronic device through a first connection between the first electronic device and the third electronic device, establish a second connection between the first electronic device and a second electronic device distinct from the third electronic device and third connection for transmission of graphic data from the third electronic device to the second electronic device, transmit a second signal for requesting generation of the graphic data including the character controlled based on the second user input to the second electronic device through the second connection, and control the character independently of the transmission of the graphic data based on the third connection.

A computing node is disclosed. The computing node comprises processing circuitry configured to cause the computing node to receive a message (102) comprising configuration information for a resource of a data object that is hosted at the computing node and is associated with a computational operation, which computational operation is executable by the computing node. The processing circuitry is further configured to cause the computing node to configure (104) the resource of the data object on the computing node in accordance with the received configuration information, and to execute (106) the computational operation in accordance with the configured resource. Also disclosed are a corresponding server node and methods of operating a computing node and a server node. The computing node may comprise a Lightweight Machine to Machine (LwM2M) client and the server node may comprise an LwM2M server.

A method, system, and computer program product for automated increment analysis of legacy applications are provided. The method receives a set of service properties for a service to be generated from a set of applications. The set of applications are associated with a set of resources. A subset of resources are determined based on the set of service properties. The subset of resources are to be included in the service. A resource graph of the subset of resources is generated based on the subset of resources and the set of service properties. The method generates a service increment including at least a portion of the subset of resources based on the resource graph and the set of service properties.

An example method of implementing an application for a hardware accelerator having a programmable device coupled to memory is disclosed. The method includes compiling source code of the application to generate logical circuit descriptions of kernel circuits; determining resource availability in a dynamic region of programmable logic of the programmable device, the dynamic region exclusive of a static region of the programmable logic programmed with a host interface configured to interface a computing system having the hardware accelerator; determining resource utilization by the kernel circuits in the dynamic region; determining fitting solutions of the kernel circuits within the dynamic region, each of the fitting solutions defining connectivity of the kernel circuits to banks of the memory; adding a memory subsystem to the application based on a selected fitting solution of the fitting solutions; and generating a kernel image configured to program the dynamic region to implement the kernel circuits and the memory subsystem.

Embodiments of the present invention provide a method, a system, and an apparatus for creating a virtual machine. The method includes: receiving a virtual machine creation request to create a plurality of virtual machines; dividing the plurality of virtual machines into a plurality of virtual machine groups; determining a home physical rack for each virtual machine group, where one virtual machine group corresponds to one home physical rack; and creating each virtual machine group on the home physical rack of each virtual machine group. Because each virtual machine group is created on a home physical rack to which each virtual machine group belongs, each virtual machine group is equivalent to one physical rack.

In a general aspect, a quantum logic circuit is executed on multiple processing nodes in a computing system that includes quantum computing resources. In some aspects, methods of operating the computing system may include obtaining a computer program that includes a quantum logic circuit. The methods may include obtaining hardware resource metadata specifying properties of processing nodes in the computing system. The processing nodes include at least a subset of the quantum computing resources, and the hardware resource metadata includes error rate information and availability information for the respective processing nodes. The methods may include generating execution tasks configured to execute the quantum logic circuit on the processing nodes based on the hardware resource metadata; dispatching the execution tasks to the processing nodes; receiving output data generated by the processing nodes; and producing an output of the computer program based on the output data.

A computer-implemented method, a computer program product, and a computer system for determining optimal data access for deep learning applications on a cluster. A server determines candidate cache locations for one or more compute nodes in the cluster. The server fetches a mini-batch of a dataset located at a remote storage service into the candidate cache locations. The server collects information about time periods of completing a job on the one or more nodes, where the job is executed against fetched mini-batch at the candidate cache locations and the mini-batch at the remote storage location. The server selects, from the candidate cache locations and the remote storage location, a cache location. The server fetches the data of the dataset from the remote storage service to the cache location, and the one or more nodes execute the job against fetched data of the dataset at the cache location.

Disclosed is a data set and node cache-based scheduling method, which includes: obtaining storage resource information of each host node; in response to receiving a training task, obtaining operation information of the training task, and according to the operation information and the storage resource information, screening host nodes that satisfy a space required by the training task; in response to no host node satisfying the space required by the training task, scoring each host node according to the storage resource information; according to scoring results, selecting, from among all of the host nodes, a host node to be executed that is used to execute the training task; and obtaining and deleting an obsolete data set cache in the host node to be executed, and executing the training task in the host node to be executed.