A caching system including a first sub-cache and a second sub-cache in parallel with the first sub-cache, wherein the second sub-cache includes a set of cache lines, line type bits configured to store an indication that a corresponding cache line of the set of cache lines is configured to store write-miss data, and an eviction controller configured to flush stored write-miss data based on the line type bits.

A translation lookaside buffer (TLB) having a fixed sub-TLB and a configurable sub-TLB and methods of using the TLB are provided. The TLB includes a fixed sub-TLB and a configurable sub-TLB. The fixed sub-TLB, during runtime, may store a first plurality of TLB entries corresponding to a first page size set. The configurable sub-TLB, during runtime, is configurable to store a second plurality of TLB entries of a second page size set. The second page size set includes at least a first page size of the first page size set and includes at least a second page size not of the first page size set.

An apparatus to facilitate cache replacement is disclosed. The apparatus includes a cache memory and cache replacement logic to manage data in the cache memory. The cache replacement logic includes tracking logic to track addresses accessed at the cache memory and replacement control logic to monitor the tracking logic and apply a replacement policy based on information received from the tracking logic.

An apparatus to facilitate cache replacement is disclosed. The apparatus includes a cache memory and cache replacement logic to manage data in the cache memory. The cache replacement logic includes tracking logic to track addresses accessed at the cache memory and replacement control logic to monitor the tracking logic and apply a replacement policy based on information received from the tracking logic.

Embodiments of a system for dynamic reconfiguration of cache are disclosed. Accordingly, the system includes a plurality of processors and a plurality of memory modules executed by the plurality of processors. The system also includes a dynamic reconfigurable cache comprising of a multi-level cache implementing a combination of an L1 cache, an L2 cache, and an L3 cache. The one or more of the L1 cache, the L2 cache, and the L3 cache are dynamically reconfigurable to one or more sizes based at least in part on an application data size associated with an application being executed by the plurality of processors. In an embodiment, the system includes a reconfiguration control and distribution module configured to perform dynamic reconfiguration of the dynamic reconfigurable cache based on the application data size.

Provided are a method and apparatus for managing a page cache for multiple foreground applications. A method of managing a page cache includes identifying an application accessing to data stored in storage; allocating a page used by the application for the accessed data to a page cache; setting a page variable corresponding to a type of the identified application to the allocated page; and managing demoting of the allocated page based on the set page when the allocated page is a demoting target.

A method includes obtaining data from a plurality of data sources associated with an n-gram indexing data structure and storing at least a portion of the obtained data in a first storage, the stored data comprising one or more n-gram strings. The method also includes estimating frequencies of occurrence of respective ones of the n-gram strings in the stored data, the estimated frequency of occurrence of a given n-gram string being based at least in part on a size of a given n-gram index in the n-gram indexing data structure corresponding to the given n-gram string. The method further includes, in response to detecting one or more designated conditions, selecting a portion of the stored data based at least in part on the estimated frequencies and moving the selected portion of the stored data from the first storage to a second storage having different read and write access times.

A method includes obtaining data from a plurality of data sources associated with an n-gram indexing data structure and storing at least a portion of the obtained data in a first storage, the stored data comprising one or more n-gram strings. The method also includes estimating frequencies of occurrence of respective ones of the n-gram strings in the stored data, the estimated frequency of occurrence of a given n-gram string being based at least in part on a size of a given n-gram index in the n-gram indexing data structure corresponding to the given n-gram string. The method further includes, in response to detecting one or more designated conditions, selecting a portion of the stored data based at least in part on the estimated frequencies and moving the selected portion of the stored data from the first storage to a second storage having different read and write access times.

Techniques for caching data are provided that include receiving, by a caching system, a write memory command for a memory address, the write memory command associated with a first color tag, determining, by a first sub-cache of the caching system, that the memory address is not cached in the first sub-cache, determining, by second sub-cache of the caching system, that the memory address is not cached in the second sub-cache, storing first data associated with the first write memory command in a cache line of the second sub-cache, storing the first color tag in the second sub-cache, receiving a second write memory command for the cache line, the write memory command associated with a second color tag, merging the second color tag with the first color tag, storing the merged color tag, and evicting the cache line based on the merged color tag.

Metadata of extent-based storage systems can be managed. For example, a computing device can store a first metadata object and a second metadata object in a first memory device. The first metadata object can specify locations of a first set of extents corresponding to a first data unit stored in a second memory device. The second metadata object can specify locations of a second set of extents corresponding to a second data unit stored in the second memory device. The computing device can determine that a first size of the first metadata object is smaller than a second size of the second metadata object. The computing device can remove the second metadata object from the first memory device based on determining that the first size is less than the second size.